The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate the state of the CPU model. More...

#include <exec_context.hh>

Inheritance diagram for ExecContext:

Public Types
typedef TheISA::IntReg	IntReg

typedef TheISA::PCState	PCState

typedef TheISA::FloatReg	FloatReg

typedef TheISA::FloatRegBits	FloatRegBits

typedef TheISA::MiscReg	MiscReg

typedef TheISA::CCReg	CCReg

Public Member Functions
virtual ThreadContext *	tcBase ()=0
	Returns a pointer to the ThreadContext. More...

Integer Register Interfaces
virtual IntReg	readIntRegOperand (const StaticInst *si, int idx)=0
	Reads an integer register. More...

virtual void	setIntRegOperand (const StaticInst *si, int idx, IntReg val)=0
	Sets an integer register to a value. More...

Floating Point Register Interfaces
virtual FloatReg	readFloatRegOperand (const StaticInst *si, int idx)=0
	Reads a floating point register of single register width. More...

virtual FloatRegBits	readFloatRegOperandBits (const StaticInst *si, int idx)=0
	Reads a floating point register in its binary format, instead of by value. More...

virtual void	setFloatRegOperand (const StaticInst *si, int idx, FloatReg val)=0
	Sets a floating point register of single width to a value. More...

virtual void	setFloatRegOperandBits (const StaticInst *si, int idx, FloatRegBits val)=0
	Sets the bits of a floating point register of single width to a binary value. More...

Condition Code Registers
virtual CCReg	readCCRegOperand (const StaticInst *si, int idx)=0

virtual void	setCCRegOperand (const StaticInst *si, int idx, CCReg val)=0

Misc Register Interfaces
virtual MiscReg	readMiscRegOperand (const StaticInst *si, int idx)=0

virtual void	setMiscRegOperand (const StaticInst *si, int idx, const MiscReg &val)=0

virtual MiscReg	readMiscReg (int misc_reg)=0
	Reads a miscellaneous register, handling any architectural side effects due to reading that register. More...

virtual void	setMiscReg (int misc_reg, const MiscReg &val)=0
	Sets a miscellaneous register, handling any architectural side effects due to writing that register. More...

PC Control
virtual PCState	pcState () const =0

virtual void	pcState (const PCState &val)=0

Memory Interface
virtual void	setEA (Addr EA)=0
	Record the effective address of the instruction. More...

virtual Addr	getEA () const =0
	Get the effective address of the instruction. More...

virtual Fault	readMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags)
	Perform an atomic memory read operation. More...

virtual Fault	initiateMemRead (Addr addr, unsigned int size, Request::Flags flags)
	Initiate a timing memory read operation. More...

virtual Fault	writeMem (uint8_t data, unsigned int size, Addr addr, Request::Flags flags, uint64_t res)=0
	For atomic-mode contexts, perform an atomic memory write operation. More...

virtual void	setStCondFailures (unsigned int sc_failures)=0
	Sets the number of consecutive store conditional failures. More...

virtual unsigned int	readStCondFailures () const =0
	Returns the number of consecutive store conditional failures. More...

SysCall Emulation Interfaces
virtual void	syscall (int64_t callnum, Fault *fault)=0
	Executes a syscall specified by the callnum. More...

Alpha-Specific Interfaces
virtual Fault	hwrei ()=0
	Somewhat Alpha-specific function that handles returning from an error or interrupt. More...

virtual bool	simPalCheck (int palFunc)=0
	Check for special simulator handling of specific PAL calls. More...

ARM-Specific Interfaces
virtual bool	readPredicate ()=0

virtual void	setPredicate (bool val)=0

X86-Specific Interfaces
virtual void	demapPage (Addr vaddr, uint64_t asn)=0
	Invalidate a page in the DTLB and ITLB. More...

virtual void	armMonitor (Addr address)=0

virtual bool	mwait (PacketPtr pkt)=0

virtual void	mwaitAtomic (ThreadContext *tc)=0

virtual AddressMonitor *	getAddrMonitor ()=0

MIPS-Specific Interfaces
virtual MiscReg	readRegOtherThread (int regIdx, ThreadID tid=InvalidThreadID)=0

virtual void	setRegOtherThread (int regIdx, MiscReg val, ThreadID tid=InvalidThreadID)=0

Detailed Description

The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate the state of the CPU model.

Register accessor methods in this class typically provide the index of the instruction's operand (e.g., 0 or 1), not the architectural register index, to simplify the implementation of register renaming. The architectural register index can be found by indexing into the instruction's own operand index table.

Note: The methods in this class typically take a raw pointer to the StaticInst is provided instead of a ref-counted StaticInstPtr to reduce overhead as an argument. This is fine as long as the implementation doesn't copy the pointer into any long-term storage (which is pretty hard to imagine they would have reason to do).

Definition at line 72 of file exec_context.hh.

Member Typedef Documentation

typedef TheISA::CCReg ExecContext::CCReg

Definition at line 80 of file exec_context.hh.

typedef TheISA::FloatReg ExecContext::FloatReg

Definition at line 76 of file exec_context.hh.

typedef TheISA::FloatRegBits ExecContext::FloatRegBits

Definition at line 77 of file exec_context.hh.

typedef TheISA::IntReg ExecContext::IntReg

Definition at line 74 of file exec_context.hh.

typedef TheISA::MiscReg ExecContext::MiscReg

Definition at line 78 of file exec_context.hh.

typedef TheISA::PCState ExecContext::PCState

Definition at line 75 of file exec_context.hh.

Member Function Documentation

virtual void ExecContext::armMonitor ( Addr address )

pure virtual

Implemented in BaseDynInst< Impl >, SimpleExecContext, CheckerCPU, and Minor::ExecContext.

virtual void ExecContext::demapPage	(	Addr	vaddr,
		uint64_t	asn
	)

pure virtual

Invalidate a page in the DTLB and ITLB.

Implemented in SimpleExecContext, CheckerCPU, BaseDynInst< Impl >, and Minor::ExecContext.

virtual AddressMonitor* ExecContext::getAddrMonitor ( )

pure virtual

Implemented in BaseDynInst< Impl >, SimpleExecContext, CheckerCPU, and Minor::ExecContext.

virtual Addr ExecContext::getEA ( ) const

pure virtual

Get the effective address of the instruction.

Note: Only valid for memory ops.

Implemented in BaseDynInst< Impl >, Minor::ExecContext, SimpleExecContext, and CheckerCPU.

virtual Fault ExecContext::hwrei ( )

pure virtual

Somewhat Alpha-specific function that handles returning from an error or interrupt.

Implemented in CheckerCPU, SimpleExecContext, BaseO3DynInst< Impl >, and Minor::ExecContext.

virtual Fault ExecContext::initiateMemRead	(	Addr	addr,
		unsigned int	size,
		Request::Flags	flags
	)

inlinevirtual

Initiate a timing memory read operation.

Must be overridden for exec contexts that support timing memory mode. Not pure virtual since exec contexts that only support atomic memory mode need not override (though in that case this function should never be called).

Reimplemented in SimpleExecContext, and Minor::ExecContext.

Definition at line 198 of file exec_context.hh.

References panic.

virtual bool ExecContext::mwait ( PacketPtr pkt )

pure virtual

Implemented in BaseDynInst< Impl >, SimpleExecContext, CheckerCPU, and Minor::ExecContext.

virtual void ExecContext::mwaitAtomic ( ThreadContext * tc )

pure virtual

Implemented in BaseDynInst< Impl >, SimpleExecContext, CheckerCPU, and Minor::ExecContext.

virtual PCState ExecContext::pcState ( ) const

pure virtual

Implemented in BaseDynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

Referenced by DecoderFaultInst::execute().

virtual void ExecContext::pcState ( const PCState & val )

pure virtual

Implemented in BaseDynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual CCReg ExecContext::readCCRegOperand	(	const StaticInst *	si,
		int	idx
	)

pure virtual

Implemented in Minor::ExecContext, BaseO3DynInst< Impl >, CheckerCPU, and SimpleExecContext.

virtual FloatReg ExecContext::readFloatRegOperand	(	const StaticInst *	si,
		int	idx
	)

pure virtual

Reads a floating point register of single register width.

Implemented in BaseO3DynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual FloatRegBits ExecContext::readFloatRegOperandBits	(	const StaticInst *	si,
		int	idx
	)

pure virtual

Reads a floating point register in its binary format, instead of by value.

Implemented in BaseO3DynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual IntReg ExecContext::readIntRegOperand	(	const StaticInst *	si,
		int	idx
	)

pure virtual

Reads an integer register.

Implemented in BaseO3DynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual Fault ExecContext::readMem	(	Addr	addr,
		uint8_t *	data,
		unsigned int	size,
		Request::Flags	flags
	)

inlinevirtual

Perform an atomic memory read operation.

Must be overridden for exec contexts that support atomic memory mode. Not pure virtual since exec contexts that only support timing memory mode need not override (though in that case this function should never be called).

Reimplemented in SimpleExecContext.

Definition at line 185 of file exec_context.hh.

References panic.

virtual MiscReg ExecContext::readMiscReg ( int misc_reg )

pure virtual

Reads a miscellaneous register, handling any architectural side effects due to reading that register.

Implemented in CheckerCPU, SimpleExecContext, Minor::ExecContext, and BaseO3DynInst< Impl >.

Referenced by McrMrcMiscInst::execute().

virtual MiscReg ExecContext::readMiscRegOperand	(	const StaticInst *	si,
		int	idx
	)

pure virtual

Implemented in CheckerCPU, SimpleExecContext, Minor::ExecContext, and BaseO3DynInst< Impl >.

virtual bool ExecContext::readPredicate ( )

pure virtual

Implemented in BaseDynInst< Impl >, SimpleExecContext, CheckerCPU, and Minor::ExecContext.

virtual MiscReg ExecContext::readRegOtherThread	(	int	regIdx,
		ThreadID	tid = `InvalidThreadID`
	)

pure virtual

Implemented in SimpleExecContext, CheckerCPU, Minor::ExecContext, and BaseO3DynInst< Impl >.

virtual unsigned int ExecContext::readStCondFailures ( ) const

pure virtual

Returns the number of consecutive store conditional failures.

Implemented in BaseDynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual void ExecContext::setCCRegOperand	(	const StaticInst *	si,
		int	idx,
		CCReg	val
	)

pure virtual

Implemented in BaseDynInst< Impl >, BaseO3DynInst< Impl >, Minor::ExecContext, CheckerCPU, and SimpleExecContext.

virtual void ExecContext::setEA ( Addr EA )

pure virtual

Record the effective address of the instruction.

Note: Only valid for memory ops.

Implemented in BaseDynInst< Impl >, Minor::ExecContext, SimpleExecContext, and CheckerCPU.

virtual void ExecContext::setFloatRegOperand	(	const StaticInst *	si,
		int	idx,
		FloatReg	val
	)

pure virtual

Sets a floating point register of single width to a value.

Implemented in BaseDynInst< Impl >, BaseO3DynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual void ExecContext::setFloatRegOperandBits	(	const StaticInst *	si,
		int	idx,
		FloatRegBits	val
	)

pure virtual

Sets the bits of a floating point register of single width to a binary value.

Implemented in BaseDynInst< Impl >, BaseO3DynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual void ExecContext::setIntRegOperand	(	const StaticInst *	si,
		int	idx,
		IntReg	val
	)

pure virtual

Sets an integer register to a value.

Implemented in BaseDynInst< Impl >, BaseO3DynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual void ExecContext::setMiscReg	(	int	misc_reg,
		const MiscReg &	val
	)

pure virtual

Sets a miscellaneous register, handling any architectural side effects due to writing that register.

Implemented in CheckerCPU, SimpleExecContext, Minor::ExecContext, and BaseO3DynInst< Impl >.

virtual void ExecContext::setMiscRegOperand	(	const StaticInst *	si,
		int	idx,
		const MiscReg &	val
	)

pure virtual

Implemented in CheckerCPU, SimpleExecContext, Minor::ExecContext, and BaseO3DynInst< Impl >.

virtual void ExecContext::setPredicate ( bool val )

pure virtual

Implemented in BaseDynInst< Impl >, SimpleExecContext, CheckerCPU, and Minor::ExecContext.

virtual void ExecContext::setRegOtherThread	(	int	regIdx,
		MiscReg	val,
		ThreadID	tid = `InvalidThreadID`
	)

pure virtual

Implemented in SimpleExecContext, CheckerCPU, and BaseO3DynInst< Impl >.

virtual void ExecContext::setStCondFailures ( unsigned int sc_failures )

pure virtual

Sets the number of consecutive store conditional failures.

Implemented in BaseDynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual bool ExecContext::simPalCheck ( int palFunc )

pure virtual

Check for special simulator handling of specific PAL calls.

If return value is false, actual PAL call will be suppressed.

Implemented in CheckerCPU, SimpleExecContext, BaseO3DynInst< Impl >, and Minor::ExecContext.

virtual void ExecContext::syscall	(	int64_t	callnum,
		Fault *	fault
	)

pure virtual

Executes a syscall specified by the callnum.

Implemented in CheckerCPU, SimpleExecContext, Minor::ExecContext, and BaseO3DynInst< Impl >.

virtual ThreadContext* ExecContext::tcBase ( )

pure virtual

Returns a pointer to the ThreadContext.

Implemented in BaseDynInst< Impl >, CheckerCPU, SimpleExecContext, and Minor::ExecContext.

virtual Fault ExecContext::writeMem	(	uint8_t *	data,
		unsigned int	size,
		Addr	addr,
		Request::Flags	flags,
		uint64_t *	res
	)

pure virtual

For atomic-mode contexts, perform an atomic memory write operation.

For timing-mode contexts, initiate a timing memory write operation.

Implemented in SimpleExecContext, and Minor::ExecContext.

The documentation for this class was generated from the following file:

cpu/exec_context.hh

Public Types

Public Member Functions

Detailed Description

Member Typedef Documentation

Member Function Documentation