gem5
|
#include <exec_context.hh>
Public Member Functions | |
SimpleExecContext (BaseSimpleCPU *_cpu, SimpleThread *_thread) | |
Constructor. More... | |
IntReg | readIntRegOperand (const StaticInst *si, int idx) override |
Reads an integer register. More... | |
void | setIntRegOperand (const StaticInst *si, int idx, IntReg val) override |
Sets an integer register to a value. More... | |
FloatReg | readFloatRegOperand (const StaticInst *si, int idx) override |
Reads a floating point register of single register width. More... | |
FloatRegBits | readFloatRegOperandBits (const StaticInst *si, int idx) override |
Reads a floating point register in its binary format, instead of by value. More... | |
void | setFloatRegOperand (const StaticInst *si, int idx, FloatReg val) override |
Sets a floating point register of single width to a value. More... | |
void | setFloatRegOperandBits (const StaticInst *si, int idx, FloatRegBits val) override |
Sets the bits of a floating point register of single width to a binary value. More... | |
CCReg | readCCRegOperand (const StaticInst *si, int idx) override |
void | setCCRegOperand (const StaticInst *si, int idx, CCReg val) override |
MiscReg | readMiscRegOperand (const StaticInst *si, int idx) override |
void | setMiscRegOperand (const StaticInst *si, int idx, const MiscReg &val) override |
MiscReg | readMiscReg (int misc_reg) override |
Reads a miscellaneous register, handling any architectural side effects due to reading that register. More... | |
void | setMiscReg (int misc_reg, const MiscReg &val) override |
Sets a miscellaneous register, handling any architectural side effects due to writing that register. More... | |
PCState | pcState () const override |
void | pcState (const PCState &val) override |
void | setEA (Addr EA) override |
Record the effective address of the instruction. More... | |
Addr | getEA () const override |
Get the effective address of the instruction. More... | |
Fault | readMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags) override |
Perform an atomic memory read operation. More... | |
Fault | initiateMemRead (Addr addr, unsigned int size, Request::Flags flags) override |
Initiate a timing memory read operation. More... | |
Fault | writeMem (uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res) override |
For atomic-mode contexts, perform an atomic memory write operation. More... | |
void | setStCondFailures (unsigned int sc_failures) override |
Sets the number of consecutive store conditional failures. More... | |
unsigned int | readStCondFailures () const override |
Returns the number of consecutive store conditional failures. More... | |
void | syscall (int64_t callnum, Fault *fault) override |
Executes a syscall specified by the callnum. More... | |
ThreadContext * | tcBase () override |
Returns a pointer to the ThreadContext. More... | |
Fault | hwrei () override |
Somewhat Alpha-specific function that handles returning from an error or interrupt. More... | |
bool | simPalCheck (int palFunc) override |
Check for special simulator handling of specific PAL calls. More... | |
bool | readPredicate () override |
void | setPredicate (bool val) override |
void | demapPage (Addr vaddr, uint64_t asn) override |
Invalidate a page in the DTLB and ITLB. More... | |
void | armMonitor (Addr address) override |
bool | mwait (PacketPtr pkt) override |
void | mwaitAtomic (ThreadContext *tc) override |
AddressMonitor * | getAddrMonitor () override |
MiscReg | readRegOtherThread (int regIdx, ThreadID tid=InvalidThreadID) override |
void | setRegOtherThread (int regIdx, MiscReg val, ThreadID tid=InvalidThreadID) override |
Integer Register Interfaces | |
Floating Point Register Interfaces | |
Condition Code Registers | |
Misc Register Interfaces | |
PC Control | |
Memory Interface | |
SysCall Emulation Interfaces | |
Alpha-Specific Interfaces | |
ARM-Specific Interfaces | |
X86-Specific Interfaces | |
MIPS-Specific Interfaces |
Protected Types | |
typedef TheISA::MiscReg | MiscReg |
typedef TheISA::FloatReg | FloatReg |
typedef TheISA::FloatRegBits | FloatRegBits |
typedef TheISA::CCReg | CCReg |
Additional Inherited Members | |
Public Types inherited from ExecContext | |
typedef TheISA::IntReg | IntReg |
typedef TheISA::PCState | PCState |
typedef TheISA::FloatReg | FloatReg |
typedef TheISA::FloatRegBits | FloatRegBits |
typedef TheISA::MiscReg | MiscReg |
typedef TheISA::CCReg | CCReg |
Definition at line 60 of file exec_context.hh.
|
protected |
Definition at line 65 of file exec_context.hh.
|
protected |
Definition at line 63 of file exec_context.hh.
|
protected |
Definition at line 64 of file exec_context.hh.
|
protected |
Definition at line 62 of file exec_context.hh.
|
inline |
Constructor.
Definition at line 158 of file exec_context.hh.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 380 of file exec_context.hh.
References cpu, thread, and ThreadState::threadId().
|
inlineoverridevirtual |
Invalidate a page in the DTLB and ITLB.
Implements ExecContext.
Definition at line 375 of file exec_context.hh.
References SimpleThread::demapPage(), and thread.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 395 of file exec_context.hh.
References cpu, thread, and ThreadState::threadId().
|
inlineoverridevirtual |
Get the effective address of the instruction.
Implements ExecContext.
Definition at line 286 of file exec_context.hh.
References panic.
|
inlineoverridevirtual |
Somewhat Alpha-specific function that handles returning from an error or interrupt.
Implements ExecContext.
Definition at line 344 of file exec_context.hh.
References SimpleThread::hwrei(), and thread.
|
inlineoverridevirtual |
Initiate a timing memory read operation.
Must be overridden for exec contexts that support timing memory mode. Not pure virtual since exec contexts that only support atomic memory mode need not override (though in that case this function should never be called).
Reimplemented from ExecContext.
Definition at line 295 of file exec_context.hh.
References cpu, and BaseSimpleCPU::initiateMemRead().
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 385 of file exec_context.hh.
References cpu, thread, and ThreadState::threadId().
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 390 of file exec_context.hh.
References cpu, SimpleThread::dtb, thread, and ThreadState::threadId().
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 262 of file exec_context.hh.
References SimpleThread::pcState(), and thread.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 267 of file exec_context.hh.
References SimpleThread::pcState(), and thread.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 213 of file exec_context.hh.
References AlphaISA::CC_Reg_Base, numCCRegReads, SimpleThread::readCCReg(), StaticInst::srcRegIdx(), and thread.
|
inlineoverridevirtual |
Reads a floating point register of single register width.
Implements ExecContext.
Definition at line 178 of file exec_context.hh.
References AlphaISA::FP_Reg_Base, numFpRegReads, SimpleThread::readFloatReg(), StaticInst::srcRegIdx(), and thread.
|
inlineoverridevirtual |
Reads a floating point register in its binary format, instead of by value.
Implements ExecContext.
Definition at line 187 of file exec_context.hh.
References AlphaISA::FP_Reg_Base, numFpRegReads, SimpleThread::readFloatRegBits(), StaticInst::srcRegIdx(), and thread.
|
inlineoverridevirtual |
Reads an integer register.
Implements ExecContext.
Definition at line 164 of file exec_context.hh.
References numIntRegReads, SimpleThread::readIntReg(), StaticInst::srcRegIdx(), and thread.
|
inlineoverridevirtual |
Perform an atomic memory read operation.
Must be overridden for exec contexts that support atomic memory mode. Not pure virtual since exec contexts that only support timing memory mode need not override (though in that case this function should never be called).
Reimplemented from ExecContext.
Definition at line 289 of file exec_context.hh.
References cpu, and BaseSimpleCPU::readMem().
|
inlineoverridevirtual |
Reads a miscellaneous register, handling any architectural side effects due to reading that register.
Implements ExecContext.
Definition at line 246 of file exec_context.hh.
References numIntRegReads, SimpleThread::readMiscReg(), and thread.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 227 of file exec_context.hh.
References AlphaISA::Misc_Reg_Base, numIntRegReads, SimpleThread::readMiscReg(), StaticInst::srcRegIdx(), and thread.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 358 of file exec_context.hh.
References SimpleThread::readPredicate(), and thread.
|
inlineoverridevirtual |
|
inlineoverridevirtual |
Returns the number of consecutive store conditional failures.
Implements ExecContext.
Definition at line 318 of file exec_context.hh.
References SimpleThread::readStCondFailures(), and thread.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 220 of file exec_context.hh.
References AlphaISA::CC_Reg_Base, StaticInst::destRegIdx(), numCCRegWrites, SimpleThread::setCCReg(), and thread.
|
inlineoverridevirtual |
Record the effective address of the instruction.
Implements ExecContext.
Definition at line 278 of file exec_context.hh.
References panic.
|
inlineoverridevirtual |
Sets a floating point register of single width to a value.
Implements ExecContext.
Definition at line 195 of file exec_context.hh.
References StaticInst::destRegIdx(), AlphaISA::FP_Reg_Base, numFpRegWrites, SimpleThread::setFloatReg(), and thread.
|
inlineoverridevirtual |
Sets the bits of a floating point register of single width to a binary value.
Implements ExecContext.
Definition at line 205 of file exec_context.hh.
References StaticInst::destRegIdx(), AlphaISA::FP_Reg_Base, numFpRegWrites, SimpleThread::setFloatRegBits(), and thread.
|
inlineoverridevirtual |
Sets an integer register to a value.
Implements ExecContext.
Definition at line 171 of file exec_context.hh.
References StaticInst::destRegIdx(), numIntRegWrites, SimpleThread::setIntReg(), thread, and X86ISA::val.
|
inlineoverridevirtual |
Sets a miscellaneous register, handling any architectural side effects due to writing that register.
Implements ExecContext.
Definition at line 256 of file exec_context.hh.
References numIntRegWrites, SimpleThread::setMiscReg(), and thread.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 234 of file exec_context.hh.
References StaticInst::destRegIdx(), AlphaISA::Misc_Reg_Base, numIntRegWrites, SimpleThread::setMiscReg(), and thread.
|
inlineoverridevirtual |
Implements ExecContext.
Definition at line 363 of file exec_context.hh.
References cpu, Trace::InstRecord::setPredicate(), SimpleThread::setPredicate(), thread, and BaseSimpleCPU::traceData.
|
inlineoverridevirtual |
|
inlineoverridevirtual |
Sets the number of consecutive store conditional failures.
Implements ExecContext.
Definition at line 310 of file exec_context.hh.
References SimpleThread::setStCondFailures(), and thread.
|
inlineoverridevirtual |
Check for special simulator handling of specific PAL calls.
If return value is false, actual PAL call will be suppressed.
Implements ExecContext.
Definition at line 353 of file exec_context.hh.
References SimpleThread::simPalCheck(), and thread.
|
inlineoverridevirtual |
Executes a syscall specified by the callnum.
Implements ExecContext.
Definition at line 326 of file exec_context.hh.
References FullSystem, panic, SimpleThread::syscall(), and thread.
|
inlineoverridevirtual |
Returns a pointer to the ThreadContext.
Implements ExecContext.
Definition at line 335 of file exec_context.hh.
References SimpleThread::getTC(), and thread.
|
inlineoverridevirtual |
For atomic-mode contexts, perform an atomic memory write operation.
For timing-mode contexts, initiate a timing memory write operation.
Implements ExecContext.
Definition at line 301 of file exec_context.hh.
References cpu, and BaseSimpleCPU::writeMem().
BaseSimpleCPU* SimpleExecContext::cpu |
Definition at line 68 of file exec_context.hh.
Referenced by armMonitor(), getAddrMonitor(), initiateMemRead(), mwait(), mwaitAtomic(), readMem(), setPredicate(), and writeMem().
Stats::Scalar SimpleExecContext::dcacheStallCycles |
Definition at line 141 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats().
Addr SimpleExecContext::fetchOffset |
Definition at line 72 of file exec_context.hh.
Referenced by BaseSimpleCPU::advancePC(), BaseSimpleCPU::checkForInterrupts(), BaseSimpleCPU::preExecute(), and BaseSimpleCPU::setupFetchRequest().
Stats::Scalar SimpleExecContext::icacheStallCycles |
Definition at line 137 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats().
Stats::Formula SimpleExecContext::idleFraction |
Definition at line 134 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats().
Counter SimpleExecContext::lastDcacheStall |
Definition at line 142 of file exec_context.hh.
Counter SimpleExecContext::lastIcacheStall |
Definition at line 138 of file exec_context.hh.
Stats::Average SimpleExecContext::notIdleFraction |
Definition at line 133 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numBranches |
Total number of branches fetched
Definition at line 146 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numBranchMispred |
Number of misprediced branches.
Definition at line 150 of file exec_context.hh.
Referenced by BaseSimpleCPU::advancePC(), and BaseSimpleCPU::regStats().
Stats::Formula SimpleExecContext::numBusyCycles |
Definition at line 127 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numCallsReturns |
Definition at line 95 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numCCRegReads |
Definition at line 115 of file exec_context.hh.
Referenced by readCCRegOperand(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numCCRegWrites |
Definition at line 116 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats(), and setCCRegOperand().
Stats::Scalar SimpleExecContext::numCondCtrlInsts |
Definition at line 98 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numFpAluAccesses |
Definition at line 92 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numFpInsts |
Definition at line 104 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numFpRegReads |
Definition at line 111 of file exec_context.hh.
Referenced by readFloatRegOperand(), readFloatRegOperandBits(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numFpRegWrites |
Definition at line 112 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats(), setFloatRegOperand(), and setFloatRegOperandBits().
Stats::Formula SimpleExecContext::numIdleCycles |
Definition at line 124 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats().
Counter SimpleExecContext::numInst |
PER-THREAD STATS.
Definition at line 83 of file exec_context.hh.
Referenced by BaseSimpleCPU::countInst(), and BaseSimpleCPU::preExecute().
Stats::Scalar SimpleExecContext::numInsts |
Definition at line 84 of file exec_context.hh.
Referenced by BaseSimpleCPU::countInst(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numIntAluAccesses |
Definition at line 89 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numIntInsts |
Definition at line 101 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numIntRegReads |
Definition at line 107 of file exec_context.hh.
Referenced by readIntRegOperand(), readMiscReg(), readMiscRegOperand(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numIntRegWrites |
Definition at line 108 of file exec_context.hh.
Referenced by BaseSimpleCPU::regStats(), setIntRegOperand(), setMiscReg(), and setMiscRegOperand().
Counter SimpleExecContext::numLoad |
Definition at line 130 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute().
Stats::Scalar SimpleExecContext::numLoadInsts |
Definition at line 120 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numMemRefs |
Definition at line 119 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
Counter SimpleExecContext::numOp |
Definition at line 85 of file exec_context.hh.
Referenced by BaseSimpleCPU::countInst().
Stats::Scalar SimpleExecContext::numOps |
Definition at line 86 of file exec_context.hh.
Referenced by BaseSimpleCPU::countInst(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numPredictedBranches |
Number of branches predicted as taken.
Definition at line 148 of file exec_context.hh.
Referenced by BaseSimpleCPU::preExecute(), and BaseSimpleCPU::regStats().
Stats::Scalar SimpleExecContext::numStoreInsts |
Definition at line 121 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
TheISA::PCState SimpleExecContext::predPC |
Definition at line 78 of file exec_context.hh.
Referenced by BaseSimpleCPU::advancePC(), and BaseSimpleCPU::preExecute().
Stats::Vector SimpleExecContext::statExecutedInstType |
Definition at line 154 of file exec_context.hh.
Referenced by BaseSimpleCPU::postExecute(), and BaseSimpleCPU::regStats().
bool SimpleExecContext::stayAtPC |
Definition at line 75 of file exec_context.hh.
Referenced by TimingSimpleCPU::advanceInst(), AtomicSimpleCPU::isDrained(), TimingSimpleCPU::isDrained(), BaseSimpleCPU::preExecute(), TimingSimpleCPU::switchOut(), and AtomicSimpleCPU::tick().
SimpleThread* SimpleExecContext::thread |
Definition at line 69 of file exec_context.hh.
Referenced by BaseSimpleCPU::advancePC(), armMonitor(), BaseSimpleCPU::checkForInterrupts(), BaseSimpleCPU::countInst(), demapPage(), TimingSimpleCPU::fetch(), getAddrMonitor(), TimingSimpleCPU::handleReadPacket(), TimingSimpleCPU::handleWritePacket(), hwrei(), TimingSimpleCPU::initiateMemRead(), AtomicSimpleCPU::isDrained(), TimingSimpleCPU::isDrained(), mwait(), mwaitAtomic(), pcState(), BaseSimpleCPU::postExecute(), BaseSimpleCPU::preExecute(), readCCRegOperand(), readFloatRegOperand(), readFloatRegOperandBits(), readIntRegOperand(), AtomicSimpleCPU::readMem(), readMiscReg(), readMiscRegOperand(), readPredicate(), readStCondFailures(), TimingSimpleCPU::sendData(), setCCRegOperand(), setFloatRegOperand(), setFloatRegOperandBits(), setIntRegOperand(), setMiscReg(), setMiscRegOperand(), setPredicate(), setStCondFailures(), BaseSimpleCPU::setupFetchRequest(), simPalCheck(), TimingSimpleCPU::switchOut(), syscall(), tcBase(), AtomicSimpleCPU::tick(), AtomicSimpleCPU::writeMem(), and TimingSimpleCPU::writeMem().