BaseSimpleCPU Class Reference

#include <base.hh>

Inheritance diagram for BaseSimpleCPU:

Public Member Functions
	BaseSimpleCPU (BaseSimpleCPUParams *params)
virtual	~BaseSimpleCPU ()
void	wakeup (ThreadID tid) override
void	init () override
Addr	dbg_vtophys (Addr addr)
void	checkForInterrupts ()
void	setupFetchRequest (Request *req)
void	preExecute ()
void	postExecute ()
void	advancePC (const Fault &fault)
void	haltContext (ThreadID thread_num) override
void	regStats () override
void	resetStats () override
void	startup () override
virtual Fault	readMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags)=0
virtual Fault	initiateMemRead (Addr addr, unsigned size, Request::Flags flags)=0
virtual Fault	writeMem (uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res)=0
void	countInst ()
Counter	totalInsts () const override
Counter	totalOps () const override
void	serializeThread (CheckpointOut &cp, ThreadID tid) const override
void	unserializeThread (CheckpointIn &cp, ThreadID tid) override

Public Attributes
Trace::InstRecord *	traceData
CheckerCPU *	checker
std::vector< SimpleExecContext * >	threadInfo
std::list< ThreadID >	activeThreads
TheISA::MachInst	inst
	Current instruction. More...
StaticInstPtr	curStaticInst
StaticInstPtr	curMacroStaticInst

Protected Types
enum	Status {   Idle, Running, Faulting, ITBWaitResponse,   IcacheRetry, IcacheWaitResponse, IcacheWaitSwitch, DTBWaitResponse,   DcacheRetry, DcacheWaitResponse, DcacheWaitSwitch }

Protected Member Functions
void	checkPcEventQueue ()
void	swapActiveThread ()

Protected Attributes
ThreadID	curThread
BPredUnit *	branchPred
Status	_status

Additional Inherited Members
Static Public Member Functions inherited from BaseCPU
static int	numSimulatedInsts ()
static int	numSimulatedOps ()
static void	wakeup (ThreadID tid)

Detailed Description

Definition at line 84 of file base.hh.

Member Enumeration Documentation

enum BaseSimpleCPU::Status

protected

Enumerator
Idle
Running
Faulting
ITBWaitResponse
IcacheRetry
IcacheWaitResponse
IcacheWaitSwitch
DTBWaitResponse
DcacheRetry
DcacheWaitResponse
DcacheWaitSwitch

Definition at line 111 of file base.hh.

Constructor & Destructor Documentation

BaseSimpleCPU::BaseSimpleCPU

(

BaseSimpleCPUParams *

params

)

Definition at line 90 of file base.cc.

References checker, fatal, FullSystem, SimpleThread::getTC(), ArmISA::i, CheckerCPU::setSystem(), and threadInfo.

BaseSimpleCPU::~BaseSimpleCPU ( )

virtual

Definition at line 209 of file base.cc.

Member Function Documentation

void BaseSimpleCPU::advancePC

(

const Fault &

fault

)

Definition at line 642 of file base.cc.

References AlphaISA::advancePC(), branchPred, curMacroStaticInst, curStaticInst, curThread, SimpleThread::decoder, SimpleExecContext::fetchOffset, StaticInst::isControl(), StaticInst::isLastMicroop(), NoFault, StaticInst::nullStaticInstPtr, SimpleExecContext::numBranchMispred, SimpleThread::pcState(), SimpleExecContext::predPC, BPredUnit::squash(), SimpleExecContext::thread, threadInfo, and BPredUnit::update().

Referenced by TimingSimpleCPU::advanceInst(), and AtomicSimpleCPU::tick().

void BaseSimpleCPU::checkForInterrupts

(

)

Definition at line 431 of file base.cc.

References curThread, SimpleThread::decoder, SimpleExecContext::fetchOffset, SimpleThread::getTC(), interrupt, NoFault, SimpleExecContext::thread, and threadInfo.

Referenced by TimingSimpleCPU::fetch(), and AtomicSimpleCPU::tick().

void BaseSimpleCPU::checkPcEventQueue ( )

protected

Definition at line 145 of file base.cc.

References curThread, pc, ArmISA::system, and threadInfo.

Referenced by TimingSimpleCPU::fetch(), and AtomicSimpleCPU::tick().

void BaseSimpleCPU::countInst

(

)

Definition at line 172 of file base.cc.

References curStaticInst, curThread, ThreadState::funcExeInst, StaticInst::isLastMicroop(), StaticInst::isMicroop(), SimpleExecContext::numInst, SimpleExecContext::numInsts, SimpleExecContext::numOp, SimpleExecContext::numOps, ArmISA::system, SimpleExecContext::thread, and threadInfo.

Referenced by TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), and AtomicSimpleCPU::tick().

Addr BaseSimpleCPU::dbg_vtophys

(

Addr

addr

)

Definition at line 414 of file base.cc.

References curThread, and AlphaISA::vtophys().

void BaseSimpleCPU::haltContext ( ThreadID  thread_num )

override

Definition at line 214 of file base.cc.

void BaseSimpleCPU::init ( )

override

Definition at line 129 of file base.cc.

References FullSystem, Stats::init, and AlphaISA::initCPU().

Referenced by TimingSimpleCPU::init(), and AtomicSimpleCPU::init().

virtual Fault BaseSimpleCPU::initiateMemRead ( Addr  addr, unsigned  size, Request::Flags  flags  )

pure virtual

Implemented in TimingSimpleCPU, and AtomicSimpleCPU.

Referenced by SimpleExecContext::initiateMemRead().

void BaseSimpleCPU::postExecute

(

)

Definition at line 558 of file base.cc.

References CPA::available(), FunctionProfile::consume(), CPA::cpa(), curStaticInst, curThread, Trace::InstRecord::dump(), FullSystem, AlphaISA::inUserMode(), StaticInst::isCall(), StaticInst::isCondCtrl(), StaticInst::isControl(), StaticInst::isFloating(), StaticInst::isInteger(), StaticInst::isLoad(), StaticInst::isMemRef(), StaticInst::isReturn(), StaticInst::isStore(), SimpleExecContext::numBranches, SimpleExecContext::numCallsReturns, SimpleExecContext::numCondCtrlInsts, SimpleExecContext::numFpAluAccesses, SimpleExecContext::numFpInsts, SimpleExecContext::numIntAluAccesses, SimpleExecContext::numIntInsts, SimpleExecContext::numLoad, SimpleExecContext::numLoadInsts, SimpleExecContext::numMemRefs, SimpleExecContext::numStoreInsts, StaticInst::opClass(), pc, ThreadState::profile, ThreadState::profileNode, ThreadState::profilePC, SimpleExecContext::statExecutedInstType, CPA::swAutoBegin(), SimpleExecContext::thread, threadInfo, and traceData.

Referenced by TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), AtomicSimpleCPU::tick(), and TimingSimpleCPU::translationFault().

void BaseSimpleCPU::preExecute

(

)

Definition at line 468 of file base.cc.

References branchPred, curMacroStaticInst, curStaticInst, curThread, curTick(), SimpleThread::decoder, DPRINTF, StaticInst::fetchMicroop(), SimpleExecContext::fetchOffset, StaticInst::getName(), SimpleThread::getTC(), BigEndianGuest::gtoh(), inst, StaticInst::isControl(), StaticInst::isMacroop(), isRomMicroPC(), StaticInst::machInst, SimpleExecContext::numInst, SimpleExecContext::numPredictedBranches, SimpleThread::pcState(), BPredUnit::predict(), SimpleExecContext::predPC, SimpleThread::setFloatReg(), SimpleThread::setIntReg(), SimpleExecContext::stayAtPC, ArmISA::system, SimpleExecContext::thread, threadInfo, traceData, and AlphaISA::ZeroReg.

Referenced by TimingSimpleCPU::completeIfetch(), and AtomicSimpleCPU::tick().

virtual Fault BaseSimpleCPU::readMem ( Addr  addr, uint8_t *  data, unsigned  size, Request::Flags  flags  )

pure virtual

Implemented in TimingSimpleCPU, and AtomicSimpleCPU.

Referenced by SimpleExecContext::readMem().

void BaseSimpleCPU::regStats ( )

override

Definition at line 222 of file base.cc.

References Stats::constant(), SimpleExecContext::dcacheStallCycles, Stats::DataWrap< Derived, InfoProxyType >::desc(), Stats::dist, Stats::DataWrap< Derived, InfoProxyType >::flags(), ArmISA::i, SimpleExecContext::icacheStallCycles, SimpleExecContext::idleFraction, Stats::VectorBase< Derived, Stor >::init(), name(), Stats::DataWrap< Derived, InfoProxyType >::name(), SimpleExecContext::notIdleFraction, Stats::nozero, Num_OpClasses, SimpleExecContext::numBranches, SimpleExecContext::numBranchMispred, SimpleExecContext::numBusyCycles, SimpleExecContext::numCallsReturns, SimpleExecContext::numCCRegReads, SimpleExecContext::numCCRegWrites, SimpleExecContext::numCondCtrlInsts, SimpleExecContext::numFpAluAccesses, SimpleExecContext::numFpInsts, SimpleExecContext::numFpRegReads, SimpleExecContext::numFpRegWrites, SimpleExecContext::numIdleCycles, SimpleExecContext::numInsts, SimpleExecContext::numIntAluAccesses, SimpleExecContext::numIntInsts, SimpleExecContext::numIntRegReads, SimpleExecContext::numIntRegWrites, SimpleExecContext::numLoadInsts, SimpleExecContext::numMemRefs, SimpleExecContext::numOps, SimpleExecContext::numPredictedBranches, SimpleExecContext::numStoreInsts, Stats::pdf, Stats::DataWrap< Derived, InfoProxyType >::prereq(), SimpleExecContext::statExecutedInstType, Stats::DataWrapVec< Derived, InfoProxyType >::subname(), threadInfo, and Stats::total.

void BaseSimpleCPU::resetStats ( )

override

Definition at line 387 of file base.cc.

References _status, Idle, and threadInfo.

void BaseSimpleCPU::serializeThread ( CheckpointOut &  cp, ThreadID  tid  ) const

override

Definition at line 395 of file base.cc.

References _status, Idle, Running, and threadInfo.

void BaseSimpleCPU::setupFetchRequest

(

Request *

req

)

Definition at line 451 of file base.cc.

References curThread, DPRINTF, SimpleExecContext::fetchOffset, Request::INST_FETCH, SimpleThread::instAddr(), Request::setVirt(), SimpleExecContext::thread, and threadInfo.

Referenced by TimingSimpleCPU::fetch(), and AtomicSimpleCPU::tick().

void BaseSimpleCPU::startup ( )

override

Definition at line 682 of file base.cc.

References threadInfo.

void BaseSimpleCPU::swapActiveThread ( )

protected

Definition at line 156 of file base.cc.

References activeThreads, curStaticInst, curThread, StaticInst::isDelayedCommit(), and threadInfo.

Referenced by TimingSimpleCPU::fetch(), and AtomicSimpleCPU::tick().

Counter BaseSimpleCPU::totalInsts ( ) const

override

Definition at line 188 of file base.cc.

References threadInfo.

Counter BaseSimpleCPU::totalOps ( ) const

override

Definition at line 199 of file base.cc.

References threadInfo.

void BaseSimpleCPU::unserializeThread ( CheckpointIn &  cp, ThreadID  tid  )

override

Definition at line 403 of file base.cc.

References threadInfo.

void BaseSimpleCPU::wakeup ( ThreadID  tid )

override

Definition at line 420 of file base.cc.

References DPRINTF, ThreadContext::Suspended, and threadInfo.

Referenced by AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(), TimingSimpleCPU::DcachePort::recvFunctionalSnoop(), TimingSimpleCPU::DcachePort::recvTimingSnoopReq(), TimingSimpleCPU::threadSnoop(), and AtomicSimpleCPU::threadSnoop().

virtual Fault BaseSimpleCPU::writeMem ( uint8_t *  data, unsigned  size, Addr  addr, Request::Flags  flags, uint64_t *  res  )

pure virtual

Implemented in TimingSimpleCPU, and AtomicSimpleCPU.

Referenced by SimpleExecContext::writeMem().

Member Data Documentation

Status BaseSimpleCPU::_status

protected

Definition at line 125 of file base.hh.

Referenced by AtomicSimpleCPU::activateContext(), TimingSimpleCPU::activateContext(), TimingSimpleCPU::advanceInst(), AtomicSimpleCPU::AtomicSimpleCPU(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), TimingSimpleCPU::drain(), AtomicSimpleCPU::drainResume(), TimingSimpleCPU::drainResume(), TimingSimpleCPU::fetch(), TimingSimpleCPU::finishTranslation(), TimingSimpleCPU::handleReadPacket(), TimingSimpleCPU::handleWritePacket(), TimingSimpleCPU::initiateMemRead(), TimingSimpleCPU::FetchTranslation::markDelayed(), TimingSimpleCPU::IcachePort::recvReqRetry(), TimingSimpleCPU::DcachePort::recvReqRetry(), resetStats(), TimingSimpleCPU::sendData(), TimingSimpleCPU::sendFetch(), serializeThread(), AtomicSimpleCPU::suspendContext(), TimingSimpleCPU::suspendContext(), AtomicSimpleCPU::switchOut(), TimingSimpleCPU::switchOut(), AtomicSimpleCPU::tick(), TimingSimpleCPU::TimingSimpleCPU(), and TimingSimpleCPU::writeMem().

std::list<ThreadID> BaseSimpleCPU::activeThreads

Definition at line 103 of file base.hh.

Referenced by AtomicSimpleCPU::activateContext(), TimingSimpleCPU::activateContext(), AtomicSimpleCPU::drain(), TimingSimpleCPU::drain(), AtomicSimpleCPU::drainResume(), TimingSimpleCPU::drainResume(), AtomicSimpleCPU::suspendContext(), TimingSimpleCPU::suspendContext(), and swapActiveThread().

BPredUnit* BaseSimpleCPU::branchPred

protected

Definition at line 88 of file base.hh.

Referenced by advancePC(), and preExecute().

CheckerCPU* BaseSimpleCPU::checker

Definition at line 100 of file base.hh.

Referenced by BaseSimpleCPU().

StaticInstPtr BaseSimpleCPU::curMacroStaticInst

Definition at line 108 of file base.hh.

Referenced by advancePC(), TimingSimpleCPU::fetch(), preExecute(), and AtomicSimpleCPU::tick().

StaticInstPtr BaseSimpleCPU::curStaticInst

Definition at line 107 of file base.hh.

Referenced by advancePC(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), countInst(), TimingSimpleCPU::fetch(), postExecute(), preExecute(), swapActiveThread(), and AtomicSimpleCPU::tick().

ThreadID BaseSimpleCPU::curThread

protected

Definition at line 87 of file base.hh.

Referenced by TimingSimpleCPU::advanceInst(), advancePC(), checkForInterrupts(), checkPcEventQueue(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), countInst(), dbg_vtophys(), TimingSimpleCPU::fetch(), TimingSimpleCPU::handleReadPacket(), TimingSimpleCPU::handleWritePacket(), TimingSimpleCPU::initiateMemRead(), AtomicSimpleCPU::isDrained(), TimingSimpleCPU::isDrained(), postExecute(), preExecute(), AtomicSimpleCPU::readMem(), TimingSimpleCPU::sendData(), setupFetchRequest(), swapActiveThread(), TimingSimpleCPU::switchOut(), AtomicSimpleCPU::tick(), AtomicSimpleCPU::writeMem(), and TimingSimpleCPU::writeMem().

TheISA::MachInst BaseSimpleCPU::inst

Current instruction.

Definition at line 106 of file base.hh.

Referenced by preExecute(), TimingSimpleCPU::sendFetch(), and AtomicSimpleCPU::tick().

std::vector<SimpleExecContext*> BaseSimpleCPU::threadInfo

Definition at line 102 of file base.hh.

Referenced by AtomicSimpleCPU::activateContext(), TimingSimpleCPU::activateContext(), TimingSimpleCPU::advanceInst(), advancePC(), BaseSimpleCPU(), checkForInterrupts(), checkPcEventQueue(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), countInst(), AtomicSimpleCPU::drainResume(), TimingSimpleCPU::drainResume(), TimingSimpleCPU::fetch(), TimingSimpleCPU::handleReadPacket(), TimingSimpleCPU::handleWritePacket(), TimingSimpleCPU::initiateMemRead(), AtomicSimpleCPU::isDrained(), TimingSimpleCPU::isDrained(), postExecute(), preExecute(), AtomicSimpleCPU::readMem(), TimingSimpleCPU::DcachePort::recvTimingSnoopReq(), regStats(), resetStats(), TimingSimpleCPU::sendData(), serializeThread(), setupFetchRequest(), startup(), AtomicSimpleCPU::suspendContext(), TimingSimpleCPU::suspendContext(), swapActiveThread(), TimingSimpleCPU::switchOut(), TimingSimpleCPU::threadSnoop(), AtomicSimpleCPU::threadSnoop(), AtomicSimpleCPU::tick(), totalInsts(), totalOps(), unserializeThread(), wakeup(), AtomicSimpleCPU::writeMem(), and TimingSimpleCPU::writeMem().

Trace::InstRecord* BaseSimpleCPU::traceData

Definition at line 99 of file base.hh.

Referenced by TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), TimingSimpleCPU::initiateMemRead(), postExecute(), preExecute(), AtomicSimpleCPU::readMem(), SimpleExecContext::setPredicate(), AtomicSimpleCPU::tick(), TimingSimpleCPU::translationFault(), AtomicSimpleCPU::writeMem(), and TimingSimpleCPU::writeMem().

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The documentation for this class was generated from the following files:

• cpu/simple/base.hh
• cpu/simple/base.cc