gem5
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#include <atomic.hh>
Classes | |
class | AtomicCPUDPort |
class | AtomicCPUPort |
An AtomicCPUPort overrides the default behaviour of the recvAtomicSnoop and ignores the packet instead of panicking. More... | |
struct | TickEvent |
Public Member Functions | |
AtomicSimpleCPU (AtomicSimpleCPUParams *params) | |
virtual | ~AtomicSimpleCPU () |
void | init () override |
DrainState | drain () override |
void | drainResume () override |
void | switchOut () override |
void | takeOverFrom (BaseCPU *oldCPU) override |
void | verifyMemoryMode () const override |
void | activateContext (ThreadID thread_num) override |
void | suspendContext (ThreadID thread_num) override |
Fault | readMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags) override |
Fault | initiateMemRead (Addr addr, unsigned size, Request::Flags flags) override |
Fault | writeMem (uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res) override |
void | regProbePoints () override |
void | printAddr (Addr a) |
Print state of address in memory system via PrintReq (for debugging). More... | |
Public Member Functions inherited from BaseSimpleCPU | |
BaseSimpleCPU (BaseSimpleCPUParams *params) | |
virtual | ~BaseSimpleCPU () |
void | wakeup (ThreadID tid) override |
void | init () override |
Addr | dbg_vtophys (Addr addr) |
void | checkForInterrupts () |
void | setupFetchRequest (Request *req) |
void | preExecute () |
void | postExecute () |
void | advancePC (const Fault &fault) |
void | haltContext (ThreadID thread_num) override |
void | regStats () override |
void | resetStats () override |
void | startup () override |
void | countInst () |
Counter | totalInsts () const override |
Counter | totalOps () const override |
void | serializeThread (CheckpointOut &cp, ThreadID tid) const override |
void | unserializeThread (CheckpointIn &cp, ThreadID tid) override |
Protected Member Functions | |
MasterPort & | getDataPort () override |
Return a reference to the data port. More... | |
MasterPort & | getInstPort () override |
Return a reference to the instruction port. More... | |
void | threadSnoop (PacketPtr pkt, ThreadID sender) |
Perform snoop for other cpu-local thread contexts. More... | |
Protected Member Functions inherited from BaseSimpleCPU | |
void | checkPcEventQueue () |
void | swapActiveThread () |
Private Member Functions | |
void | tick () |
bool | isDrained () |
Check if a system is in a drained state. More... | |
bool | tryCompleteDrain () |
Try to complete a drain request. More... | |
Private Attributes | |
TickEvent | tickEvent |
const int | width |
bool | locked |
const bool | simulate_data_stalls |
const bool | simulate_inst_stalls |
AtomicCPUPort | icachePort |
AtomicCPUDPort | dcachePort |
bool | fastmem |
Request | ifetch_req |
Request | data_read_req |
Request | data_write_req |
bool | dcache_access |
Tick | dcache_latency |
ProbePointArg< std::pair < SimpleThread *, const StaticInstPtr > > * | ppCommit |
Probe Points. More... | |
Additional Inherited Members | |
Static Public Member Functions inherited from BaseCPU | |
static int | numSimulatedInsts () |
static int | numSimulatedOps () |
static void | wakeup (ThreadID tid) |
Public Attributes inherited from BaseSimpleCPU | |
Trace::InstRecord * | traceData |
CheckerCPU * | checker |
std::vector< SimpleExecContext * > | threadInfo |
std::list< ThreadID > | activeThreads |
TheISA::MachInst | inst |
Current instruction. More... | |
StaticInstPtr | curStaticInst |
StaticInstPtr | curMacroStaticInst |
Protected Types inherited from BaseSimpleCPU | |
enum | Status { Idle, Running, Faulting, ITBWaitResponse, IcacheRetry, IcacheWaitResponse, IcacheWaitSwitch, DTBWaitResponse, DcacheRetry, DcacheWaitResponse, DcacheWaitSwitch } |
Protected Attributes inherited from BaseSimpleCPU | |
ThreadID | curThread |
BPredUnit * | branchPred |
Status | _status |
AtomicSimpleCPU::AtomicSimpleCPU | ( | AtomicSimpleCPUParams * | params | ) |
Definition at line 96 of file atomic.cc.
References BaseSimpleCPU::_status, and BaseSimpleCPU::Idle.
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Definition at line 109 of file atomic.cc.
References Event::scheduled(), and tickEvent.
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override |
Definition at line 230 of file atomic.cc.
References BaseSimpleCPU::_status, BaseSimpleCPU::activeThreads, DPRINTF, BaseSimpleCPU::Running, Event::scheduled(), BaseSimpleCPU::threadInfo, and tickEvent.
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Definition at line 117 of file atomic.cc.
References BaseSimpleCPU::activeThreads, DPRINTF, Drained, Draining, isDrained(), Event::scheduled(), and tickEvent.
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Definition at line 154 of file atomic.cc.
References BaseSimpleCPU::_status, ThreadContext::Active, BaseSimpleCPU::activeThreads, DPRINTF, BaseSimpleCPU::Idle, BaseSimpleCPU::Running, Event::scheduled(), BaseSimpleCPU::threadInfo, tickEvent, and verifyMemoryMode().
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Return a reference to the data port.
Definition at line 184 of file atomic.hh.
References dcachePort.
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inlineoverrideprotected |
Return a reference to the instruction port.
Definition at line 187 of file atomic.hh.
References icachePort.
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override |
Definition at line 86 of file atomic.cc.
References data_read_req, data_write_req, ifetch_req, BaseSimpleCPU::init(), and Request::setContext().
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overridevirtual |
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inlineprivate |
Check if a system is in a drained state.
We need to drain if:
We are in the middle of a microcode sequence as some CPUs (e.g., HW accelerated CPUs) can't be started in the middle of a gem5 microcode sequence.
The CPU is in a LLSC region. This shouldn't normally happen as these are executed atomically within a single tick() call. The only way this can happen at the moment is if there is an event in the PC event queue that affects the CPU state while it is in an LLSC region.
Definition at line 100 of file atomic.hh.
References BaseSimpleCPU::curThread, locked, SimpleThread::microPC(), SimpleExecContext::stayAtPC, SimpleExecContext::thread, and BaseSimpleCPU::threadInfo.
Referenced by drain(), switchOut(), and tryCompleteDrain().
void AtomicSimpleCPU::printAddr | ( | Addr | a | ) |
Print state of address in memory system via PrintReq (for debugging).
Definition at line 700 of file atomic.cc.
References dcachePort, and MasterPort::printAddr().
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overridevirtual |
Implements BaseSimpleCPU.
Definition at line 338 of file atomic.cc.
References addr, BaseSimpleCPU::curThread, data_read_req, Packet::dataStatic(), dcache_access, dcache_latency, dcachePort, SimpleThread::dtb, fastmem, Packet::getAddr(), Request::getFlags(), SimpleThread::getTC(), GenericISA::handleIprRead(), AlphaISA::handleLockedRead(), Packet::isError(), Request::isLLSC(), Request::isLockedRMW(), Request::isMmappedIpr(), Request::isPrefetch(), Flags< T >::isSet(), locked, Packet::makeReadCmd(), Request::NO_ACCESS, NoFault, SimpleThread::pcState(), BaseTLB::Read, roundDown(), MasterPort::sendAtomic(), Trace::InstRecord::setMem(), Request::setVirt(), X86ISA::size(), ArmISA::system, Request::taskId(), SimpleExecContext::thread, BaseSimpleCPU::threadInfo, and BaseSimpleCPU::traceData.
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override |
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Definition at line 257 of file atomic.cc.
References BaseSimpleCPU::_status, BaseSimpleCPU::activeThreads, DPRINTF, BaseSimpleCPU::Idle, BaseSimpleCPU::Running, Event::scheduled(), BaseSimpleCPU::threadInfo, and tickEvent.
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override |
Definition at line 201 of file atomic.cc.
References BaseSimpleCPU::_status, BaseSimpleCPU::Idle, isDrained(), BaseSimpleCPU::Running, Event::scheduled(), and tickEvent.
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override |
Definition at line 212 of file atomic.cc.
References Event::scheduled(), takeOverFrom(), and tickEvent.
Perform snoop for other cpu-local thread contexts.
Definition at line 136 of file atomic.cc.
References AtomicSimpleCPU::AtomicCPUDPort::cacheBlockMask, Packet::cmdString(), dcachePort, DPRINTF, Packet::getAddr(), AlphaISA::handleLockedSnoop(), BaseSimpleCPU::threadInfo, and BaseSimpleCPU::wakeup().
Referenced by writeMem().
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private |
Definition at line 551 of file atomic.cc.
References BaseSimpleCPU::_status, BaseSimpleCPU::advancePC(), BaseSimpleCPU::checkForInterrupts(), BaseSimpleCPU::checkPcEventQueue(), BaseSimpleCPU::countInst(), BaseSimpleCPU::curMacroStaticInst, BaseSimpleCPU::curStaticInst, BaseSimpleCPU::curThread, curTick(), data_read_req, data_write_req, Packet::dataStatic(), dcache_access, dcache_latency, divCeil(), DPRINTF, DTRACE, BaseTLB::Execute, StaticInst::execute(), fastmem, Packet::getAddr(), SimpleThread::getTC(), ArmISA::i, icachePort, BaseSimpleCPU::Idle, ifetch_req, BaseSimpleCPU::inst, StaticInst::isDelayedCommit(), Packet::isError(), StaticInst::isFirstMicroop(), StaticInst::isMicroop(), isRomMicroPC(), SimpleThread::itb, locked, NoFault, SimpleThread::pcState(), BaseSimpleCPU::postExecute(), ppCommit, BaseSimpleCPU::preExecute(), MemCmd::ReadReq, MasterPort::sendAtomic(), Request::setContext(), BaseSimpleCPU::setupFetchRequest(), simulate_data_stalls, simulate_inst_stalls, SimpleExecContext::stayAtPC, BaseSimpleCPU::swapActiveThread(), ArmISA::system, Request::taskId(), SimpleExecContext::thread, BaseSimpleCPU::threadInfo, tickEvent, BaseSimpleCPU::traceData, tryCompleteDrain(), and width.
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Definition at line 221 of file atomic.cc.
References fatal, and ArmISA::system.
Referenced by drainResume().
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Implements BaseSimpleCPU.
Definition at line 434 of file atomic.cc.
References addr, Request::CACHE_BLOCK_ZERO, AtomicSimpleCPU::AtomicCPUDPort::cacheBlockMask, BaseSimpleCPU::curThread, data_write_req, Packet::dataStatic(), dcache_access, dcache_latency, dcachePort, SimpleThread::dtb, fastmem, Packet::getAddr(), Packet::getConstPtr(), Request::getExtraData(), Request::getFlags(), SimpleThread::getTC(), GenericISA::handleIprWrite(), AlphaISA::handleLockedWrite(), Request::isCondSwap(), Packet::isError(), Request::isLLSC(), Request::isLockedRMW(), Request::isMmappedIpr(), Request::isPrefetch(), Flags< T >::isSet(), Request::isSwap(), locked, Request::NO_ACCESS, NoFault, SimpleThread::pcState(), roundDown(), MasterPort::sendAtomic(), Request::setExtraData(), Trace::InstRecord::setMem(), Request::setVirt(), X86ISA::size(), MemCmd::StoreCondReq, MemCmd::SwapReq, ArmISA::system, Request::taskId(), SimpleExecContext::thread, BaseSimpleCPU::threadInfo, threadSnoop(), BaseSimpleCPU::traceData, BaseTLB::Write, and MemCmd::WriteReq.
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Definition at line 173 of file atomic.hh.
Referenced by init(), tick(), and writeMem().
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Definition at line 175 of file atomic.hh.
Referenced by readMem(), tick(), and writeMem().
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Definition at line 176 of file atomic.hh.
Referenced by readMem(), tick(), and writeMem().
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Definition at line 168 of file atomic.hh.
Referenced by getDataPort(), printAddr(), readMem(), threadSnoop(), and writeMem().
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Definition at line 170 of file atomic.hh.
Referenced by readMem(), tick(), and writeMem().
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Definition at line 167 of file atomic.hh.
Referenced by getInstPort(), and tick().
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Definition at line 75 of file atomic.hh.
Referenced by isDrained(), readMem(), tick(), and writeMem().
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Definition at line 72 of file atomic.hh.
Referenced by activateContext(), drain(), drainResume(), suspendContext(), switchOut(), takeOverFrom(), tick(), and ~AtomicSimpleCPU().
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