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gem5
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Implementation of a PL390 GIC. More...
#include <vector>#include "base/addr_range.hh"#include "base/bitunion.hh"#include "cpu/intr_control.hh"#include "dev/arm/base_gic.hh"#include "dev/io_device.hh"#include "dev/platform.hh"#include "params/Pl390.hh"Go to the source code of this file.
Classes | |
| class | Pl390 |
| struct | Pl390::BankedRegs |
| Registers "banked for each connected processor" per ARM IHI0048B. More... | |
| class | Pl390::PostIntEvent |
| Event definition to post interrupt to CPU after a delay. More... | |
Implementation of a PL390 GIC.
Definition in file gic_pl390.hh.