#include <gic_pl390.hh>

Inheritance diagram for Pl390:

Classes
struct	BankedRegs
	Registers "banked for each connected processor" per ARM IHI0048B. More...

class	PostIntEvent
	Event definition to post interrupt to CPU after a delay. More...

Public Types
typedef Pl390Params	Params

Public Types inherited from BaseGic
typedef struct BaseGicParams	Params

Public Types inherited from PioDevice
typedef PioDeviceParams	Params

Public Types inherited from MemObject
typedef MemObjectParams	Params

Public Types inherited from ClockedObject
typedef ClockedObjectParams	Params
	Parameters of ClockedObject. More...

Public Types inherited from SimObject
typedef SimObjectParams	Params

Public Member Functions
const Params *	params () const

	Pl390 (const Params *p)

DrainState	drain () override
	Notify an object that it needs to drain its state. More...

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

AddrRangeList	getAddrRanges () const override
	Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to. More...

Tick	read (PacketPtr pkt) override
	A PIO read to the device, immediately split up into readDistributor() or readCpu() More...

Tick	write (PacketPtr pkt) override
	A PIO read to the device, immediately split up into writeDistributor() or writeCpu() More...

void	sendInt (uint32_t number) override
	Post an interrupt from a device that is connected to the GIC. More...

void	clearInt (uint32_t number) override
	Clear an interrupt from a device that is connected to the GIC. More...

void	sendPPInt (uint32_t num, uint32_t cpu) override
	Interface call for private peripheral interrupts. More...

void	clearPPInt (uint32_t num, uint32_t cpu) override


void	driveSPI (uint32_t spi)

void	driveLegIRQ (bool state)

void	driveLegFIQ (bool state)

void	driveIrqEn (bool state)

Public Member Functions inherited from BaseGic
	BaseGic (const Params *p)

virtual	~BaseGic ()

const Params *	params () const

Public Member Functions inherited from PioDevice
	PioDevice (const Params *p)

virtual	~PioDevice ()

const Params *	params () const

virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected. More...

virtual BaseSlavePort &	getSlavePort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a slave port with a given name and index. More...

Public Member Functions inherited from MemObject
const Params *	params () const

	MemObject (const Params *params)

virtual BaseMasterPort &	getMasterPort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a master port with a given name and index. More...

Public Member Functions inherited from ClockedObject
	ClockedObject (const ClockedObjectParams *p)

const Params *	params () const

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Enums::PwrState	pwrState () const

std::string	pwrStateName () const

std::vector< double >	pwrStateWeights () const
	Returns the percentage residency for each power state. More...

void	computeStats ()
	Record stats values like state residency by computing the time difference from previous update. More...

void	pwrState (Enums::PwrState)

void	regStats () override
	Register statistics for this object. More...

Public Member Functions inherited from SimObject
const Params *	params () const

	SimObject (const Params *_params)

virtual	~SimObject ()

virtual const std::string	name () const

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	resetStats ()
	Reset statistics associated with this object. More...

virtual void	regProbePoints ()
	Register probe points for this object. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

virtual void	startup ()
	startup() is the final initialization call before simulation. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from EventManager
	EventManager (EventManager &em)

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick)-1)

void	setCurTick (Tick newVal)

Public Member Functions inherited from Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

virtual void	notifyFork ()
	Notify a child process of a fork. More...

Public Member Functions inherited from Clocked
void	updateClockPeriod () const
	Update the tick to the current tick. More...

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge. More...

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Protected Types
enum	{ GICD_CTLR = 0x000, GICD_TYPER = 0x004, GICD_IIDR = 0x008, GICD_SGIR = 0xf00, DIST_SIZE = 0xfff }

enum	{ GICC_CTLR = 0x00, GICC_PMR = 0x04, GICC_BPR = 0x08, GICC_IAR = 0x0C, GICC_EOIR = 0x10, GICC_RPR = 0x14, GICC_HPPIR = 0x18, GICC_ABPR = 0x1c, GICC_IIDR = 0xfc, CPU_SIZE = 0xff }

Protected Member Functions
	BitUnion32 (SWI) Bitfield<3

	EndBitUnion (SWI) BitUnion32(IAR) Bitfield<9

BankedRegs &	getBankedRegs (ContextID)

uint32_t &	getIntEnabled (ContextID ctx, uint32_t ix)

uint32_t &	getPendingInt (ContextID ctx, uint32_t ix)

uint32_t &	getActiveInt (ContextID ctx, uint32_t ix)

uint8_t &	getIntPriority (ContextID ctx, uint32_t ix)

uint8_t	getCpuTarget (ContextID ctx, uint32_t ix)

uint8_t	getCpuPriority (unsigned cpu)

void	softInt (ContextID ctx, SWI swi)
	software generated interrupt More...

void	updateIntState (int hint)
	See if some processor interrupt flags need to be enabled/disabled. More...

void	updateRunPri ()
	Update the register that records priority of the highest priority active interrupt. More...

uint64_t	genSwiMask (int cpu)
	generate a bit mask to check cpuSgi for an interrupt. More...

int	intNumToWord (int num) const

int	intNumToBit (int num) const

void	postInt (uint32_t cpu, Tick when)
	Post an interrupt to a CPU with a delay. More...

void	postDelayedInt (uint32_t cpu)
	Deliver a delayed interrupt to the target CPU. More...

Tick	readDistributor (PacketPtr pkt)
	Handle a read to the distributor portion of the GIC. More...

uint32_t	readDistributor (ContextID ctx, Addr daddr, size_t resp_sz)

uint32_t	readDistributor (ContextID ctx, Addr daddr) override

Tick	readCpu (PacketPtr pkt)
	Handle a read to the cpu portion of the GIC. More...

uint32_t	readCpu (ContextID ctx, Addr daddr) override

Tick	writeDistributor (PacketPtr pkt)
	Handle a write to the distributor portion of the GIC. More...

void	writeDistributor (ContextID ctx, Addr daddr, uint32_t data, size_t data_sz)

void	writeDistributor (ContextID ctx, Addr daddr, uint32_t data) override

Tick	writeCpu (PacketPtr pkt)
	Handle a write to the cpu portion of the GIC. More...

void	writeCpu (ContextID ctx, Addr daddr, uint32_t data) override

Protected Member Functions inherited from Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain. More...

void	signalDrainDone () const
	Signal that an object is drained. More...

Protected Member Functions inherited from Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters. More...

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance. More...

void	resetClock () const
	Reset the object's clock using the current global tick value. More...

Protected Attributes
	sgi_id

Bitfield< 23, 16 >	cpu_list

Bitfield< 25, 24 >	list_type

	ack_id

Bitfield< 12, 10 >	cpu_id

EndBitUnion(IAR) protected const AddrRange	cpuRange
	Address range for the distributor interface. More...

const AddrRangeList	addrRanges
	All address ranges used by this GIC. More...

const Tick	distPioDelay
	Latency for a distributor operation. More...

const Tick	cpuPioDelay
	Latency for a cpu operation. More...

const Tick	intLatency
	Latency for a interrupt to get to CPU. More...

bool	enabled
	Gic enabled. More...

const bool	haveGem5Extensions
	Are gem5 extensions available? More...

bool	gem5ExtensionsEnabled
	gem5 many-core extension enabled by driver More...

uint32_t	itLines
	Number of itLines enabled. More...

std::vector< BankedRegs * >	bankedRegs

uint32_t	intEnabled [INT_BITS_MAX-1]
	GICD_I{S,C}ENABLER{1..31} interrupt enable bits for global interrupts 1b per interrupt, 32 bits per word, 31 words. More...

uint32_t	pendingInt [INT_BITS_MAX-1]
	GICD_I{S,C}PENDR{1..31} interrupt pending bits for global interrupts 1b per interrupt, 32 bits per word, 31 words. More...

uint32_t	activeInt [INT_BITS_MAX-1]
	GICD_I{S,C}ACTIVER{1..31} interrupt active bits for global interrupts 1b per interrupt, 32 bits per word, 31 words. More...

uint32_t	iccrpr [CPU_MAX]
	read only running priority register, 1 per cpu More...

uint8_t	intPriority [GLOBAL_INT_LINES]
	GICD_IPRIORITYR{8..255} an 8 bit priority (lower is higher priority) for each of the global (not replicated per CPU) interrupts. More...

uint8_t	cpuTarget [GLOBAL_INT_LINES]
	GICD_ITARGETSR{8..255} an 8 bit cpu target id for each global interrupt. More...

uint32_t	intConfig [INT_BITS_MAX *2]
	2 bit per interrupt signaling if it's level or edge sensitive and if it is 1:N or N:N More...

bool	cpuEnabled [CPU_MAX]
	CPU enabled. More...

uint8_t	cpuPriority [CPU_MAX]
	CPU priority. More...

uint8_t	cpuBpr [CPU_MAX]
	Binary point registers. More...

uint32_t	cpuHighestInt [CPU_MAX]
	highest interrupt that is interrupting CPU More...

uint64_t	cpuSgiPending [SGI_MAX]
	One bit per cpu per software interrupt that is pending for each possible sgi source. More...

uint64_t	cpuSgiActive [SGI_MAX]

uint32_t	cpuSgiPendingExt [CPU_MAX]
	SGI pending arrays for gem5 GIC extension mode, which instead keeps 16 SGI pending bits for each of the (large number of) CPUs. More...

uint32_t	cpuSgiActiveExt [CPU_MAX]

uint32_t	cpuPpiPending [CPU_MAX]
	One bit per private peripheral interrupt. More...

uint32_t	cpuPpiActive [CPU_MAX]

bool	irqEnable
	IRQ Enable Used for debug. More...

PostIntEvent *	postIntEvent [CPU_MAX]

int	pendingDelayedInterrupts

Protected Attributes inherited from BaseGic
Platform *	platform
	Platform this GIC belongs to. More...

Protected Attributes inherited from PioDevice
System *	sys

PioPort	pioPort
	The pioPort that handles the requests for us and provides us requests that it sees. More...

Protected Attributes inherited from ClockedObject
Enums::PwrState	_currPwrState
	To keep track of the current power state. More...

Tick	prvEvalTick

Stats::Scalar	numPwrStateTransitions

Stats::Distribution	pwrStateClkGateDist

Stats::Vector	pwrStateResidencyTicks

Protected Attributes inherited from SimObject
const SimObjectParams *	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Static Protected Attributes
static const AddrRange	GICD_IGROUPR

static const AddrRange	GICD_ISENABLER

static const AddrRange	GICD_ICENABLER

static const AddrRange	GICD_ISPENDR

static const AddrRange	GICD_ICPENDR

static const AddrRange	GICD_ISACTIVER

static const AddrRange	GICD_ICACTIVER

static const AddrRange	GICD_IPRIORITYR

static const AddrRange	GICD_ITARGETSR

static const AddrRange	GICD_ICFGR

static const int	SGI_MAX = 16

static const int	PPI_MAX = 16

static const int	SGI_MASK = 0xFFFF0000
	Mask off SGI's when setting/clearing pending bits. More...

static const int	NN_CONFIG_MASK = 0x55555555
	Mask for bits that config N:N mode in GICD_ICFGR's. More...

static const int	CPU_MAX = 256

static const int	SPURIOUS_INT = 1023

static const int	INT_BITS_MAX = 32

static const int	INT_LINES_MAX = 1020

static const int	GLOBAL_INT_LINES = INT_LINES_MAX - SGI_MAX - PPI_MAX

static const int	GICC_BPR_MINIMUM = 2
	minimum value for Binary Point Register ("IMPLEMENTATION DEFINED"); chosen for consistency with Linux's in-kernel KVM GIC model More...

Additional Inherited Members
Static Public Member Functions inherited from SimObject
static void	serializeAll (CheckpointOut &cp)
	Serialize all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

Static Public Member Functions inherited from Serializable
static const std::string &	currentSection ()
	Get the fully-qualified name of the active section. More...

static void	serializeAll (const std::string &cpt_dir)

static void	unserializeGlobals (CheckpointIn &cp)

Static Public Attributes inherited from Serializable
static int	ckptCount = 0

static int	ckptMaxCount = 0

static int	ckptPrevCount = -1

Detailed Description

Definition at line 61 of file gic_pl390.hh.

Member Typedef Documentation

typedef Pl390Params Pl390::Params

Definition at line 361 of file gic_pl390.hh.

Member Enumeration Documentation

anonymous enum

protected

Enumerator
GICD_CTLR
GICD_TYPER
GICD_IIDR
GICD_SGIR
DIST_SIZE

Definition at line 65 of file gic_pl390.hh.

anonymous enum

protected

Enumerator
GICC_CTLR
GICC_PMR
GICC_BPR
GICC_IAR
GICC_EOIR
GICC_RPR
GICC_HPPIR
GICC_ABPR
GICC_IIDR
CPU_SIZE

Definition at line 86 of file gic_pl390.hh.

Constructor & Destructor Documentation

Pl390::Pl390 ( const Params * p )

Definition at line 66 of file gic_pl390.cc.

References cpuRange.

Member Function Documentation

Pl390::BitUnion32 ( SWI )

protected

void Pl390::clearInt ( uint32_t num )

overridevirtual

Clear an interrupt from a device that is connected to the GIC.

Depending on the configuration, the GIC may de-assert it's CPU line.

Parameters

num	number of interrupt to send

Implements BaseGic.

Definition at line 825 of file gic_pl390.cc.

Referenced by MuxingKvmGic::clearInt().

void Pl390::clearPPInt	(	uint32_t	num,
		uint32_t	cpu
	)

overridevirtual

Implements BaseGic.

Definition at line 831 of file gic_pl390.cc.

References cpuPpiPending, DPRINTF, intNumToWord(), SGI_MAX, and updateIntState().

Referenced by MuxingKvmGic::clearPPInt().

DrainState Pl390::drain ( )

overridevirtual

Notify an object that it needs to drain its state.

If the object does not need further simulation to drain internal buffers, it returns DrainState::Drained and automatically switches to the Drained state. If the object needs more simulation, it returns DrainState::Draining and automatically enters the Draining state. Other return values are invalid.

Note: An object that has entered the Drained state can be disturbed by other objects in the system and consequently stop being drained. These perturbations are not visible in the drain state. The simulator therefore repeats the draining process until all objects return DrainState::Drained on the first call to drain().

Returns: DrainState::Drained if the object is drained at this point in time, DrainState::Draining if it needs further simulation.

Implements Drainable.

Definition at line 859 of file gic_pl390.cc.

References Drained, Draining, and pendingDelayedInterrupts.

Referenced by MuxingKvmGic::drain().

void Pl390::driveIrqEn ( bool state )

Definition at line 987 of file gic_pl390.cc.

References DPRINTF, irqEnable, and updateIntState().

void Pl390::driveLegFIQ ( bool state )

Definition at line 1007 of file gic_pl390.cc.

References IntrControl::clear(), ArmISA::INT_FIQ, Platform::intrctrl, BaseGic::platform, and IntrControl::post().

void Pl390::driveLegIRQ ( bool state )

Definition at line 995 of file gic_pl390.cc.

References IntrControl::clear(), cpuEnabled, DPRINTF, enabled, ArmISA::INT_IRQ, Platform::intrctrl, irqEnable, BaseGic::platform, and IntrControl::post().

void Pl390::driveSPI ( uint32_t spi )

Definition at line 977 of file gic_pl390.cc.

References DPRINTF, enabled, getPendingInt(), irqEnable, and updateIntState().

Pl390::EndBitUnion ( SWI )

protected

uint64_t Pl390::genSwiMask ( int cpu )

protected

generate a bit mask to check cpuSgi for an interrupt.

Definition at line 675 of file gic_pl390.cc.

References System::numContexts(), panic, PioDevice::sys, and ULL.

Referenced by updateIntState(), and updateRunPri().

uint32_t& Pl390::getActiveInt	(	ContextID	ctx,
		uint32_t	ix
	)

inlineprotected

Definition at line 223 of file gic_pl390.hh.

References Pl390::BankedRegs::activeInt, activeInt, getBankedRegs(), and INT_BITS_MAX.

Referenced by readCpu(), readDistributor(), updateIntState(), updateRunPri(), writeCpu(), and writeDistributor().

AddrRangeList Pl390::getAddrRanges ( ) const

inlineoverridevirtual

Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

Returns: a list of non-overlapping address ranges

Implements PioDevice.

Definition at line 375 of file gic_pl390.hh.

References addrRanges.

Pl390::BankedRegs & Pl390::getBankedRegs ( ContextID ctx )

protected

Definition at line 595 of file gic_pl390.cc.

References bankedRegs.

Referenced by getActiveInt(), getIntEnabled(), getIntPriority(), getPendingInt(), and unserialize().

uint8_t Pl390::getCpuPriority ( unsigned cpu )

protected

Definition at line 683 of file gic_pl390.cc.

References cpuBpr, and cpuPriority.

Referenced by updateIntState().

uint8_t Pl390::getCpuTarget	(	ContextID	ctx,
		uint32_t	ix
	)

inlineprotected

Definition at line 255 of file gic_pl390.hh.

References cpuTarget, gem5ExtensionsEnabled, INT_LINES_MAX, power(), PPI_MAX, and SGI_MAX.

Referenced by readDistributor(), sendInt(), and updateIntState().

uint32_t& Pl390::getIntEnabled	(	ContextID	ctx,
		uint32_t	ix
	)

inlineprotected

Definition at line 196 of file gic_pl390.hh.

References getBankedRegs(), Pl390::BankedRegs::intEnabled, and intEnabled.

Referenced by readDistributor(), updateIntState(), and writeDistributor().

uint8_t& Pl390::getIntPriority	(	ContextID	ctx,
		uint32_t	ix
	)

inlineprotected

Definition at line 241 of file gic_pl390.hh.

References getBankedRegs(), INT_LINES_MAX, Pl390::BankedRegs::intPriority, intPriority, PPI_MAX, and SGI_MAX.

Referenced by readDistributor(), updateIntState(), updateRunPri(), and writeDistributor().

uint32_t& Pl390::getPendingInt	(	ContextID	ctx,
		uint32_t	ix
	)

inlineprotected

Definition at line 209 of file gic_pl390.hh.

References getBankedRegs(), INT_BITS_MAX, Pl390::BankedRegs::pendingInt, and pendingInt.

Referenced by driveSPI(), readCpu(), readDistributor(), sendInt(), updateIntState(), and writeDistributor().

int Pl390::intNumToBit ( int num ) const

inlineprotected

Definition at line 331 of file gic_pl390.hh.

Referenced by readCpu(), sendInt(), updateIntState(), updateRunPri(), and writeCpu().

int Pl390::intNumToWord ( int num ) const

inlineprotected

Definition at line 330 of file gic_pl390.hh.

Referenced by clearPPInt(), readCpu(), sendInt(), sendPPInt(), updateIntState(), updateRunPri(), and writeCpu().

const Params* Pl390::params ( ) const

inline

Definition at line 363 of file gic_pl390.hh.

References SimObject::_params.

void Pl390::postDelayedInt ( uint32_t cpu )

protected

Deliver a delayed interrupt to the target CPU.

Definition at line 849 of file gic_pl390.cc.

References ArmISA::INT_IRQ, Platform::intrctrl, pendingDelayedInterrupts, BaseGic::platform, IntrControl::post(), and Drainable::signalDrainDone().

Referenced by Pl390::PostIntEvent::process().

void Pl390::postInt	(	uint32_t	cpu,
		Tick	when
	)

protected

Post an interrupt to a CPU with a delay.

Definition at line 840 of file gic_pl390.cc.

References EventManager::eventq, pendingDelayedInterrupts, postIntEvent, and EventQueue::schedule().

Referenced by updateIntState().

Tick Pl390::read ( PacketPtr pkt )

overridevirtual

A PIO read to the device, immediately split up into readDistributor() or readCpu()

Implements PioDevice.

Definition at line 99 of file gic_pl390.cc.

References addr, AddrRange::contains(), cpuRange, Packet::getAddr(), panic, readCpu(), and readDistributor().

Referenced by MuxingKvmGic::read().

Tick Pl390::readCpu ( PacketPtr pkt )

protected

Handle a read to the cpu portion of the GIC.

Parameters

pkt	packet to respond to

Definition at line 262 of file gic_pl390.cc.

References Request::contextId(), cpuPioDelay, cpuRange, DPRINTF, Packet::getAddr(), Request::hasContextId(), Packet::makeAtomicResponse(), Packet::req, Packet::set(), and AddrRange::start().

Referenced by read().

uint32_t Pl390::readCpu	(	ContextID	ctx,
		Addr	daddr
	)

overrideprotectedvirtual

Implements BaseGicRegisters.

Definition at line 280 of file gic_pl390.cc.

References bits(), IntrControl::clear(), cpuBpr, cpuEnabled, cpuHighestInt, cpuPpiActive, cpuPpiPending, cpuPriority, cpuSgiActive, cpuSgiActiveExt, cpuSgiPending, cpuSgiPendingExt, DPRINTF, enabled, gem5ExtensionsEnabled, getActiveInt(), getPendingInt(), GICC_BPR, GICC_CTLR, GICC_HPPIR, GICC_IAR, GICC_IIDR, GICC_PMR, GICC_RPR, iccrpr, ArmISA::INT_IRQ, intNumToBit(), intNumToWord(), Platform::intrctrl, System::numRunningContexts(), panic, panic_if(), BaseGic::platform, PPI_MAX, SGI_MAX, SPURIOUS_INT, PioDevice::sys, ULL, updateIntState(), updateRunPri(), and X86ISA::x.

Tick Pl390::readDistributor ( PacketPtr pkt )

protected

Handle a read to the distributor portion of the GIC.

Parameters

pkt	packet to respond to

Definition at line 126 of file gic_pl390.cc.

References Request::contextId(), distPioDelay, DPRINTF, Packet::getAddr(), Packet::getSize(), Packet::makeAtomicResponse(), panic, Packet::req, and Packet::set().

Referenced by read(), and readDistributor().

uint32_t Pl390::readDistributor	(	ContextID	ctx,
		Addr	daddr,
		size_t	resp_sz
	)

protected

Todo:: software generated interrupts and PPIs can't be configured in some ways

Definition at line 155 of file gic_pl390.cc.

References AddrRange::contains(), DPRINTF, enabled, getActiveInt(), getCpuTarget(), getIntEnabled(), getIntPriority(), getPendingInt(), GICD_CTLR, GICD_ICACTIVER, GICD_ICENABLER, GICD_ICFGR, GICD_ICPENDR, GICD_IGROUPR, GICD_IPRIORITYR, GICD_ISACTIVER, GICD_ISENABLER, GICD_ISPENDR, GICD_ITARGETSR, GICD_TYPER, haveGem5Extensions, INT_BITS_MAX, INT_LINES_MAX, intConfig, itLines, mbits(), System::numRunningContexts(), panic, AddrRange::start(), and PioDevice::sys.

uint32_t Pl390::readDistributor	(	ContextID	ctx,
		Addr	daddr
	)

inlineoverrideprotectedvirtual

Implements BaseGicRegisters.

Definition at line 410 of file gic_pl390.hh.

References readDistributor().

void Pl390::sendInt ( uint32_t num )

overridevirtual

Post an interrupt from a device that is connected to the GIC.

Depending on the configuration, the GIC will pass this interrupt on through to a CPU.

Parameters

num	number of interrupt to send

Implements BaseGic.

Definition at line 802 of file gic_pl390.cc.

References DPRINTF, gem5ExtensionsEnabled, getCpuTarget(), getPendingInt(), intNumToBit(), intNumToWord(), panic, panic_if(), PPI_MAX, SGI_MAX, and updateIntState().

Referenced by MuxingKvmGic::sendInt().

void Pl390::sendPPInt	(	uint32_t	num,
		uint32_t	cpu
	)

overridevirtual

Interface call for private peripheral interrupts.

Parameters

num	number of interrupt to send
cpu	CPU to forward interrupt to

Implements BaseGic.

Definition at line 816 of file gic_pl390.cc.

References cpuPpiPending, DPRINTF, intNumToWord(), SGI_MAX, and updateIntState().

Referenced by MuxingKvmGic::sendPPInt().

void Pl390::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Implements Serializable.

Definition at line 869 of file gic_pl390.cc.

References activeInt, bankedRegs, CPU_MAX, cpuBpr, cpuEnabled, cpuHighestInt, cpuPpiActive, cpuPpiPending, cpuPriority, cpuSgiActive, cpuSgiActiveExt, cpuSgiPending, cpuSgiPendingExt, cpuTarget, csprintf(), DPRINTF, enabled, gem5ExtensionsEnabled, GLOBAL_INT_LINES, ArmISA::i, iccrpr, INT_BITS_MAX, intConfig, intEnabled, intPriority, irqEnable, itLines, pendingInt, SERIALIZE_ARRAY, SERIALIZE_SCALAR, and SGI_MAX.

Referenced by MuxingKvmGic::serialize().

void Pl390::softInt	(	ContextID	ctx,
		SWI	swi
	)

protected

software generated interrupt

Parameters

data	data to decode that indicates which cpus to interrupt

Definition at line 605 of file gic_pl390.cc.

References cpu_list, cpuEnabled, cpuSgiPending, cpuSgiPendingExt, DPRINTF, gem5ExtensionsEnabled, ArmISA::i, System::numContexts(), PioDevice::sys, updateIntState(), and X86ISA::x.

Referenced by writeDistributor().

void Pl390::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Implements Serializable.

Definition at line 912 of file gic_pl390.cc.

References activeInt, CPU_MAX, cpuBpr, cpuEnabled, cpuHighestInt, cpuPpiActive, cpuPpiPending, cpuPriority, cpuSgiActive, cpuSgiActiveExt, cpuSgiPending, cpuSgiPendingExt, cpuTarget, csprintf(), Serializable::currentSection(), DPRINTF, enabled, CheckpointIn::entryExists(), gem5ExtensionsEnabled, getBankedRegs(), GLOBAL_INT_LINES, ArmISA::i, iccrpr, INT_BITS_MAX, intConfig, intEnabled, intPriority, irqEnable, itLines, pendingInt, postIntEvent, EventManager::schedule(), CheckpointIn::sectionExists(), SGI_MAX, Pl390::BankedRegs::unserialize(), UNSERIALIZE_ARRAY, UNSERIALIZE_OPT_SCALAR, and UNSERIALIZE_SCALAR.

Referenced by MuxingKvmGic::unserialize().

void Pl390::updateIntState ( int hint )

protected

See if some processor interrupt flags need to be enabled/disabled.

Parameters

hint	which set of interrupts needs to be checked

Definition at line 694 of file gic_pl390.cc.

References bits(), cpuEnabled, cpuHighestInt, cpuPpiPending, cpuSgiPending, cpuSgiPendingExt, curTick(), DPRINTF, enabled, gem5ExtensionsEnabled, genSwiMask(), getActiveInt(), getCpuPriority(), getCpuTarget(), getIntEnabled(), getIntPriority(), getPendingInt(), INT_BITS_MAX, intLatency, intNumToBit(), intNumToWord(), itLines, System::numContexts(), System::numRunningContexts(), postInt(), PPI_MAX, SGI_MAX, SPURIOUS_INT, PioDevice::sys, and X86ISA::x.

Referenced by clearPPInt(), driveIrqEn(), driveSPI(), readCpu(), sendInt(), sendPPInt(), softInt(), writeCpu(), and writeDistributor().

void Pl390::updateRunPri ( )

protected

Update the register that records priority of the highest priority active interrupt.

Definition at line 773 of file gic_pl390.cc.

References cpuEnabled, cpuPpiActive, cpuSgiActive, cpuSgiActiveExt, genSwiMask(), getActiveInt(), getIntPriority(), ArmISA::i, iccrpr, intNumToBit(), intNumToWord(), itLines, System::numContexts(), PPI_MAX, SGI_MAX, and PioDevice::sys.

Referenced by readCpu(), writeCpu(), and writeDistributor().

Tick Pl390::write ( PacketPtr pkt )

overridevirtual

A PIO read to the device, immediately split up into writeDistributor() or writeCpu()

Implements PioDevice.

Definition at line 113 of file gic_pl390.cc.

References addr, AddrRange::contains(), cpuRange, Packet::getAddr(), panic, writeCpu(), and writeDistributor().

Referenced by MuxingKvmGic::write().

Tick Pl390::writeCpu ( PacketPtr pkt )

protected

Handle a write to the cpu portion of the GIC.

Parameters

pkt	packet to respond to

Definition at line 523 of file gic_pl390.cc.

References Request::contextId(), cpuPioDelay, cpuRange, data, DPRINTF, Packet::get(), Packet::getAddr(), Request::hasContextId(), Packet::makeAtomicResponse(), Packet::req, and AddrRange::start().

Referenced by write().

void Pl390::writeCpu	(	ContextID	ctx,
		Addr	daddr,
		uint32_t	data
	)

overrideprotectedvirtual

Implements BaseGicRegisters.

Definition at line 541 of file gic_pl390.cc.

References cpuBpr, cpuEnabled, cpuPpiActive, cpuPriority, cpuSgiActive, cpuSgiActiveExt, data, DPRINTF, gem5ExtensionsEnabled, getActiveInt(), GICC_BPR, GICC_BPR_MINIMUM, GICC_CTLR, GICC_EOIR, GICC_PMR, intNumToBit(), intNumToWord(), panic, PPI_MAX, SGI_MAX, ULL, updateIntState(), updateRunPri(), and warn.

Tick Pl390::writeDistributor ( PacketPtr pkt )

protected

Handle a write to the distributor portion of the GIC.

Parameters

pkt	packet to respond to

Definition at line 357 of file gic_pl390.cc.

References Request::contextId(), distPioDelay, DPRINTF, Packet::get(), Packet::getAddr(), Packet::getSize(), Request::hasContextId(), M5_VAR_USED, Packet::makeAtomicResponse(), panic, and Packet::req.

Referenced by write(), and writeDistributor().

void Pl390::writeDistributor	(	ContextID	ctx,
		Addr	daddr,
		uint32_t	data,
		size_t	data_sz
	)

protected

Definition at line 392 of file gic_pl390.cc.

References bits(), AddrRange::contains(), cpuTarget, data, DPRINTF, enabled, gem5ExtensionsEnabled, getActiveInt(), getIntEnabled(), getIntPriority(), getPendingInt(), GICD_CTLR, GICD_ICACTIVER, GICD_ICENABLER, GICD_ICFGR, GICD_ICPENDR, GICD_IGROUPR, GICD_IPRIORITYR, GICD_ISACTIVER, GICD_ISENABLER, GICD_ISPENDR, GICD_ITARGETSR, GICD_SGIR, GICD_TYPER, haveGem5Extensions, INT_BITS_MAX, intConfig, ArmISA::mask, NN_CONFIG_MASK, ArmISA::offset, panic, PPI_MAX, SGI_MASK, SGI_MAX, softInt(), AddrRange::start(), updateIntState(), updateRunPri(), and warn.

void Pl390::writeDistributor	(	ContextID	ctx,
		Addr	daddr,
		uint32_t	data
	)

inlineoverrideprotectedvirtual

Implements BaseGicRegisters.

Definition at line 426 of file gic_pl390.hh.

References writeDistributor().

Member Data Documentation

Pl390::ack_id

protected

Definition at line 126 of file gic_pl390.hh.

uint32_t Pl390::activeInt[INT_BITS_MAX-1]

protected

GICD_I{S,C}ACTIVER{1..31} interrupt active bits for global interrupts 1b per interrupt, 32 bits per word, 31 words.

Definition at line 221 of file gic_pl390.hh.

Referenced by getActiveInt(), serialize(), Pl390::BankedRegs::unserialize(), and unserialize().

const AddrRangeList Pl390::addrRanges

protected

All address ranges used by this GIC.

Definition at line 138 of file gic_pl390.hh.

Referenced by getAddrRanges().

std::vector<BankedRegs*> Pl390::bankedRegs

protected

Definition at line 187 of file gic_pl390.hh.

Referenced by getBankedRegs(), and serialize().

Bitfield<12,10> Pl390::cpu_id

protected

Definition at line 127 of file gic_pl390.hh.

Bitfield<23,16> Pl390::cpu_list

protected

Definition at line 121 of file gic_pl390.hh.

Referenced by softInt().

const int Pl390::CPU_MAX = 256

staticprotected

Definition at line 109 of file gic_pl390.hh.

Referenced by serialize(), and unserialize().

uint8_t Pl390::cpuBpr[CPU_MAX]

protected

Binary point registers.

Definition at line 287 of file gic_pl390.hh.

Referenced by getCpuPriority(), readCpu(), serialize(), unserialize(), and writeCpu().

bool Pl390::cpuEnabled[CPU_MAX]

protected

CPU enabled.

Definition at line 280 of file gic_pl390.hh.

Referenced by driveLegIRQ(), readCpu(), serialize(), softInt(), unserialize(), updateIntState(), updateRunPri(), and writeCpu().

uint32_t Pl390::cpuHighestInt[CPU_MAX]

protected

highest interrupt that is interrupting CPU

Definition at line 290 of file gic_pl390.hh.

Referenced by readCpu(), serialize(), unserialize(), and updateIntState().

const Tick Pl390::cpuPioDelay

protected

Latency for a cpu operation.

Definition at line 144 of file gic_pl390.hh.

Referenced by readCpu(), and writeCpu().

uint32_t Pl390::cpuPpiActive[CPU_MAX]

protected

Definition at line 308 of file gic_pl390.hh.

Referenced by readCpu(), serialize(), unserialize(), updateRunPri(), and writeCpu().

uint32_t Pl390::cpuPpiPending[CPU_MAX]

protected

One bit per private peripheral interrupt.

Only upper 16 bits will be used since PPI interrupts are numberred from 16 to 32

Definition at line 307 of file gic_pl390.hh.

Referenced by clearPPInt(), readCpu(), sendPPInt(), serialize(), unserialize(), and updateIntState().

uint8_t Pl390::cpuPriority[CPU_MAX]

protected

CPU priority.

Definition at line 283 of file gic_pl390.hh.

Referenced by MuxingKvmGic::fromKvmToPl390(), getCpuPriority(), readCpu(), serialize(), unserialize(), and writeCpu().

EndBitUnion (IAR) protected const AddrRange Pl390::cpuRange

protected

Address range for the distributor interface.

Address range for the CPU interfaces

Definition at line 128 of file gic_pl390.hh.

Referenced by Pl390(), read(), readCpu(), write(), and writeCpu().

uint64_t Pl390::cpuSgiActive[SGI_MAX]

protected

Definition at line 297 of file gic_pl390.hh.

Referenced by readCpu(), serialize(), unserialize(), updateRunPri(), and writeCpu().

uint32_t Pl390::cpuSgiActiveExt[CPU_MAX]

protected

Definition at line 303 of file gic_pl390.hh.

Referenced by readCpu(), serialize(), unserialize(), updateRunPri(), and writeCpu().

uint64_t Pl390::cpuSgiPending[SGI_MAX]

protected

One bit per cpu per software interrupt that is pending for each possible sgi source.

Indexed by SGI number. Each byte in generating cpu id and bits in position is destination id. e.g. 0x4 = CPU 0 generated interrupt for CPU 2.

Definition at line 296 of file gic_pl390.hh.

Referenced by readCpu(), serialize(), softInt(), unserialize(), and updateIntState().

uint32_t Pl390::cpuSgiPendingExt[CPU_MAX]

protected

SGI pending arrays for gem5 GIC extension mode, which instead keeps 16 SGI pending bits for each of the (large number of) CPUs.

Definition at line 302 of file gic_pl390.hh.

Referenced by readCpu(), serialize(), softInt(), unserialize(), and updateIntState().

uint8_t Pl390::cpuTarget[GLOBAL_INT_LINES]

protected

GICD_ITARGETSR{8..255} an 8 bit cpu target id for each global interrupt.

Definition at line 253 of file gic_pl390.hh.

Referenced by getCpuTarget(), serialize(), unserialize(), and writeDistributor().

const Tick Pl390::distPioDelay

protected

Latency for a distributor operation.

Definition at line 141 of file gic_pl390.hh.

Referenced by readDistributor(), and writeDistributor().

bool Pl390::enabled

protected

Gic enabled.

Definition at line 151 of file gic_pl390.hh.

Referenced by driveLegIRQ(), driveSPI(), readCpu(), readDistributor(), serialize(), unserialize(), updateIntState(), and writeDistributor().

bool Pl390::gem5ExtensionsEnabled

protected

gem5 many-core extension enabled by driver

Definition at line 157 of file gic_pl390.hh.

Referenced by getCpuTarget(), readCpu(), sendInt(), serialize(), softInt(), unserialize(), updateIntState(), writeCpu(), and writeDistributor().

const int Pl390::GICC_BPR_MINIMUM = 2

staticprotected

minimum value for Binary Point Register ("IMPLEMENTATION DEFINED"); chosen for consistency with Linux's in-kernel KVM GIC model

Definition at line 117 of file gic_pl390.hh.

Referenced by writeCpu().

const AddrRange Pl390::GICD_ICACTIVER

staticprotected

Definition at line 80 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_ICENABLER

staticprotected

Definition at line 76 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_ICFGR

staticprotected

Definition at line 83 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_ICPENDR

staticprotected

Definition at line 78 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_IGROUPR

staticprotected

Definition at line 74 of file gic_pl390.hh.

Referenced by readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_IPRIORITYR

staticprotected

Definition at line 81 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_ISACTIVER

staticprotected

Definition at line 79 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_ISENABLER

staticprotected

Definition at line 75 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_ISPENDR

staticprotected

Definition at line 77 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const AddrRange Pl390::GICD_ITARGETSR

staticprotected

Definition at line 82 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), and writeDistributor().

const int Pl390::GLOBAL_INT_LINES = INT_LINES_MAX - SGI_MAX - PPI_MAX

staticprotected

Definition at line 113 of file gic_pl390.hh.

Referenced by serialize(), and unserialize().

const bool Pl390::haveGem5Extensions

protected

Are gem5 extensions available?

Definition at line 154 of file gic_pl390.hh.

Referenced by readDistributor(), and writeDistributor().

uint32_t Pl390::iccrpr[CPU_MAX]

protected

read only running priority register, 1 per cpu

Definition at line 233 of file gic_pl390.hh.

Referenced by readCpu(), serialize(), unserialize(), and updateRunPri().

const int Pl390::INT_BITS_MAX = 32

staticprotected

Definition at line 111 of file gic_pl390.hh.

Referenced by getActiveInt(), getPendingInt(), readDistributor(), serialize(), unserialize(), updateIntState(), and writeDistributor().

const int Pl390::INT_LINES_MAX = 1020

staticprotected

Definition at line 112 of file gic_pl390.hh.

Referenced by getCpuTarget(), getIntPriority(), and readDistributor().

uint32_t Pl390::intConfig[INT_BITS_MAX *2]

protected

2 bit per interrupt signaling if it's level or edge sensitive and if it is 1:N or N:N

Definition at line 277 of file gic_pl390.hh.

Referenced by readDistributor(), serialize(), unserialize(), and writeDistributor().

uint32_t Pl390::intEnabled[INT_BITS_MAX-1]

protected

GICD_I{S,C}ENABLER{1..31} interrupt enable bits for global interrupts 1b per interrupt, 32 bits per word, 31 words.

Definition at line 194 of file gic_pl390.hh.

Referenced by getIntEnabled(), serialize(), Pl390::BankedRegs::unserialize(), and unserialize().

const Tick Pl390::intLatency

protected

Latency for a interrupt to get to CPU.

Definition at line 147 of file gic_pl390.hh.

Referenced by updateIntState().

uint8_t Pl390::intPriority[GLOBAL_INT_LINES]

protected

GICD_IPRIORITYR{8..255} an 8 bit priority (lower is higher priority) for each of the global (not replicated per CPU) interrupts.

Definition at line 239 of file gic_pl390.hh.

Referenced by getIntPriority(), serialize(), Pl390::BankedRegs::unserialize(), and unserialize().

bool Pl390::irqEnable

protected

IRQ Enable Used for debug.

Definition at line 311 of file gic_pl390.hh.

Referenced by driveIrqEn(), driveLegIRQ(), driveSPI(), serialize(), and unserialize().

uint32_t Pl390::itLines

protected

Number of itLines enabled.

Definition at line 160 of file gic_pl390.hh.

Referenced by MuxingKvmGic::copyGicState(), readDistributor(), serialize(), unserialize(), updateIntState(), and updateRunPri().

Bitfield<25,24> Pl390::list_type

protected

Definition at line 122 of file gic_pl390.hh.

const int Pl390::NN_CONFIG_MASK = 0x55555555

staticprotected

Mask for bits that config N:N mode in GICD_ICFGR's.

Definition at line 107 of file gic_pl390.hh.

Referenced by writeDistributor().

int Pl390::pendingDelayedInterrupts

protected

Definition at line 358 of file gic_pl390.hh.

Referenced by drain(), postDelayedInt(), and postInt().

uint32_t Pl390::pendingInt[INT_BITS_MAX-1]

protected

GICD_I{S,C}PENDR{1..31} interrupt pending bits for global interrupts 1b per interrupt, 32 bits per word, 31 words.

Definition at line 207 of file gic_pl390.hh.

Referenced by getPendingInt(), serialize(), Pl390::BankedRegs::unserialize(), and unserialize().

PostIntEvent* Pl390::postIntEvent[CPU_MAX]

protected

Definition at line 357 of file gic_pl390.hh.

Referenced by postInt(), and unserialize().

const int Pl390::PPI_MAX = 16

staticprotected

Definition at line 101 of file gic_pl390.hh.

Referenced by getCpuTarget(), getIntPriority(), readCpu(), sendInt(), Pl390::BankedRegs::serialize(), Pl390::BankedRegs::unserialize(), updateIntState(), updateRunPri(), writeCpu(), and writeDistributor().

Pl390::sgi_id

protected

Definition at line 120 of file gic_pl390.hh.

const int Pl390::SGI_MASK = 0xFFFF0000

staticprotected

Mask off SGI's when setting/clearing pending bits.

Definition at line 104 of file gic_pl390.hh.

Referenced by writeDistributor().

const int Pl390::SGI_MAX = 16

staticprotected

Definition at line 100 of file gic_pl390.hh.

Referenced by clearPPInt(), getCpuTarget(), getIntPriority(), readCpu(), sendInt(), sendPPInt(), Pl390::BankedRegs::serialize(), serialize(), Pl390::BankedRegs::unserialize(), unserialize(), updateIntState(), updateRunPri(), writeCpu(), and writeDistributor().

const int Pl390::SPURIOUS_INT = 1023

staticprotected

Definition at line 110 of file gic_pl390.hh.

Referenced by readCpu(), and updateIntState().

The documentation for this class was generated from the following files:

dev/arm/gic_pl390.hh
dev/arm/gic_pl390.cc

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