Mark D. Hill

Go to Year:

• 2009, 2008, 2007, 2006, 2005, 2004, 2003, 2002, 2001, 2000.
• 1999, 1998, 1997, 1996, 1995, 1994, 1993, 1992, 1991, 1990.
• 1989, 1988, 1987 (Ph.D. Thesis), 1986, 1985, 1984, 1983.

See also: Simple, Most Cited, and Top Picks.

For online papers and pages not published in hardcopy venues, please see Web-Only Pubs.

For all online papers from projects Hill has co-led--including papers not co-authored by Hill--please see:

• Wisconsin Multifacet Publications By Year or By Topic
• Wisconsin Log-based Transactional Memory
• Wisconsin Wind Tunnel (matured): papers and annotated bibliography (pdf and ps).

2009

StealthTest: Low Overhead Online Software Testing using Transactional Memory,
Jayaram Bobba, Weiwei Xiong, Luke Yen, Mark D. Hill, and David A. Wood
Conference on Parallel Architectures and Compilation Techniques (PACT), Sep 2009.
Paper: pdf

Two Hardware-based Approaches for Deterministic Multiprocessor Replay,
Derek R. Hower, Pablo Montesinos, Luis Ceze, Mark D. Hill, and Josep Torrellas
Communications of the ACM (CACM), June 2009.
(Summarizes "Rerun" and "DeLorean" proposals from ISCA '08 for wider CACM audience.)
Paper: pdf
Technical Introduction by Jouppi: pdf

Opportunities Beyond Single-Core Microprocessors,
Mark D. Hill, Moderator
Sarita V. Adve, David A. Bader, William Dally, Vivek Sarkar, Panelists
HPCA/PPOPP, February 2009.
Panel: pdf

2008

Notary: Hardware Techniques to Enhance Signatures,
Luke Yen, Stark C. Draper, and Mark D. Hill
41st International Symposium on Microarchitecture (MICRO), November 2008.
Paper: pdf
Talk: ppt

Is Transactional Memory an Oxymoron?,
Mark D. Hill
Very Large Data Bases (VLDB) August 2008.
Keynote Talk: ppt

Amdahl's Law in the Multicore Era,
Mark D. Hill and Michael R. Marty,
IEEE Computer, July 2008.
Paper: pdf
Supplementary Website: http://www.cs.wisc.edu/multifacet/amdahl/
YouTube Video (52 minutes): Google TechTalk 02/2009
Related Talks: HPCA Keynote 02/2008 and Colloquium 08/2008
Original Technical Report (UW CS-TR-2007-1593, April 2007): pdf

Rerun: Exploiting Episodes for Lightweight Memory Race Recording,
Derek R. Hower and Mark D. Hill
International Symposium on Computer Architecture (ISCA), June 2008.
Paper: pdf
Talk: pptx ppt

TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory,
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael M. Swift, and David A. Wood
International Symposium on Computer Architecture (ISCA), June 2008.
Paper: pdf
Talk: ppt

Computer system implementing synchronized broadcast using timestamps,
Robert E. Cypher, David Wood A., Mark D. Hill, and Thomas M. Wicki,
United States Patent 7,366,843, issued April 29, 2008.

OS Support for Virtualizing Transactional Memory,
Michael M. Swift, Haris Volos, Neelam Goyal, Luke Yen, Mark D. Hill and David A Wood
Third ACM SIGPLAN Workshop on Transactional Memory (TRANSACT), February 2008.
Also appears as Univ. of Wisconsin Computer Sciences Technical Report CS-TR-2008-1630, February 2008.
Paper: pdf
Talk: ppt

Performance Pathologies in Hardware Transactional Memory,
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, and David A. Wood
IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, January-February 2008.
(Shorter, award version of ISCA2007 Paper)
Paper: pdf

Virtual Hierarchies,
Michael R. Marty and Mark D. Hill,
IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, January-February 2008.
(Shorter, award version of ISCA2007 Paper)
Paper: pdf

2007

Single-Threaded vs. Multithreaded: Where Should We Focus?,
Joel Emer, Mark D. Hill, Yale N. Patt, Joshua J, Yi, Derek Chiou, and Resit Sedag,
IEEE Micro Special Issue: Computer Archtecture Debates, November-December 2007.
Paper: pdf.

Implementing Signatures for Transactional Memory,
Daniel Sanchez, Luke Yen, Mark D. Hill, and Karthikeyan Sankaralingam
40th International Symposium on Microarchitecture (MICRO), December 2007.
Paper: pdf
Talk: ppt

Performance Pathologies in Hardware Transactional Memory,
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, and David A. Wood
International Symposium on Computer Architecture (ISCA), June 2007.
(Shorter, award version appears in Micro Top Picks Jan/Feb 2008)
Paper: pdf
Reference: ACM
Talk: ppt Extended Talk: ppt

Virtual Hierarchies to Support Server Consolidation,
Michael R. Marty and Mark D. Hill
International Symposium on Computer Architecture (ISCA), June 2007.
(Shorter, award version appears in Micro Top Picks Jan/Feb 2008)
Paper: pdf
Talk: ppt

A Case for Deconstructing Hardware Transactional Memory Systems,
Mark D. Hill, Derek Hower, Kevin E. Moore, Michael M. Swift, Haris Volos and David A. Wood
Univ. of Wisconsin Computer Sciences Technical Report CS-TR-2007-1594, June 2007.
Technical Report: pdf
Also appears as Dagstuhl Seminar Proceedings 07361, editors Albert Cohen, Maria J. Garzaran, Christian Lengauer, and Samuel P. Midkiff, 2008.
Report: pdf

System and method for enhancing communication between devices in a computer system,
David Wood, Robert C. Zak, Jr., Monica Wong-Chan, Christopher J. Jackson, Thomas P. Webber, and Mark D. Hill,
United States Patent 7,225,383, issued May 29, 2007.

Log-based Transactional Memory,
Overview Talk, April 2007.

LogTM-SE: Decoupling Hardware Transactional Memory from Caches,
Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E. Moore, Haris Volos, Mark D. Hill, Michael M. Swift, and David A. Wood
International Symposium on High Performance Computer Architecture (HPCA), February 2007.
Paper: pdf
Reference: IEEE Xplore
Talk: ppt, pdf

A Hardware Memory Race Recorder for Deterministic Replay,
Min Xu, Rastislav Bodik, and Mark D. Hill,
IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, January-February 2007.
(Summarizes ``Flight Data Recorder'' work from ISCA 2003 and ASPLOS 2006 papers).
Paper: pdf
Talk: ppt (based on Xu's 2006 Ph.D. Defense)

2006

Coherence Ordering for Ring-based Chip Multiprocessors,
Michael R. Marty and Mark D. Hill,
39th International Symposium on Microarchitecture (MICRO), December 2006.
Paper: pdf
Talk: ppt

A Regulated Transitive Reduction (RTR) for Longer Memory Race Recording,
Min Xu, Rastislav Bodik and Mark D. Hill
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2006.
Paper: pdf
Reference: ACM (not yet available)
Top Picks 2007 follow-on: pdf
Talk: pdf, ppt

Supporting Nested Transactional Memory in LogTM,
Michelle J. Moravan, Jayaram Bobba, Kevin E. Moore, Luke Yen, Mark D. Hill, Ben Liblit, Michael M. Swift and David A. Wood
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2006.
Paper: pdf
Reference: ACM
Talk: pdf, ppt

A Wiki for Discussing and Promoting Best Practices in Research,
Mark D. Hill, Jean-Luc Gaudiot, Mary Hall, Joe Marks, Paolo Prinetto, and Donna Baglio,
Communications of the ACM (CACM), September 2006.
Paper: pdf
Reference: ACM
Wiki: http://wiki.acm.org/healthcc/

LogTM: Log-based Transactional Memory,
Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan, Mark D. Hill and David A. Wood
International Symposium on High Performance Computer Architecture (HPCA), February 2006.
Paper: pdf
Reference: IEEE Xplore
Talk: ppt, pdf

Computer system implementing synchronized broadcast using skew control and queuing,
Robert E. Cypher, Mark D. Hill, and David A. Wood,
United States Patent 7,136,980 issued November 14, 2006.

2005

Multifacet's General Execution-driven Multiprocessor Simulator (GEMS) Toolset,
Milo M.K. Martin, Daniel J. Sorin, Bradford M. Beckmann, Michael R. Marty, Min Xu, Alaa R. Alameldeen, Kevin E. Moore, Mark D. Hill, and David A. Wood,
Computer Architecture News (CAN), September 2005.
Paper: pdf
Web Site: http://www.cs.wisc.edu/gems
ISCA Tutorial Slides: ppt

A Serializability Violation Detector for Shared-Memory Server Programs,
Min Xu, Rastislav Bodik and Mark D. Hill
Programming Language Design and Implementation (PLDI), June 2005.
Paper: pdf
Reference: ACM
Talk: pdf, ppt

Thread-Level Transactional Memory,
Kevin E. Moore, Mark D. Hill, and David A. Wood,
Univ. of Wisconsin Computer Sciences Technical Report CS-TR-2005-1524, March 2005.
Technical Report: pdf

Improving Multiple-CMP Systems Using Token Coherence,
Michael R. Marty, Jesse D. Bingham, Mark D. Hill, Alan J. Hu, Milo M.K. Martin and David A. Wood,
International Symposium on High Performance Computer Architecture (HPCA), February 2005.
Paper: pdf
Talk: ppt
Extended Talk: ppt

Token based cache-coherence protocol,
Milo M. Martin, Mark D. Hill, and David A. Wood,,
United States Patent 6,981,097 issued December 27, 2005.

Bandwidth-adaptive, hybrid, cache-coherence protocol,
Milo M. Martin, Daniel J. Sorin, Mark D. Hill, and David A. Wood,,
United States Patent 6,883,070 issued April 19, 2005.

2004

Interaction Cost: For when event counts just don't add up,
Brian A. Fields, Rastislav Bodik, Mark D. Hill, and Chris J. Newburn,
IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, November-December 2004.
Paper: pdf
Expanded TACO 2004 Journal Version: pdf

Future Computer Advances are Between a Rock (Slow Memory) and a Hard Place (Multithreading)
(Talk to CSTB and US government agencies),
Mark D. Hill,
The National Academies's Computer Science and Telecommunications Board (CSTB) Meeting, October 2004.
Talk: ppt

Interaction Cost and Shotgun Profiling,
Brian A. Fields, Rastislav Bodik, Mark D. Hill, and Chris J. Newburn,
ACM Trans. on Architecture and Compiler Optimizations (TACO), September 2004.
Paper: pdf
Original Micro 2003 Conference Version: pdf
Reference: ACM

A Future for Parallel Computer Architectures
(Keynote talk to parallel software researchers),
Mark D. Hill,
International Conference on Parallel Processing (ICPP), August 2004.
Talk: ppt

Using Speculation to Simplify Multiprocessor Design,
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, and David A. Wood,
International Parallel and Distributed Processing Symposium (IPDPS), April 2004.
Paper: pdf
Talk: ppt

Evaluating a $2M Commercial Server on a $2K PC and Related Challenges (Invited Talk),
Mark D. Hill,
Workshop On Computer Architecture Evaluation using Commercial Workloads (CAECW), February 2004.
Talk Abstract: pdf
Talk: ppt

Hierarchical SMP computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,826,660 issued November 30, 2004.

Method and device for a context-based memory management system,
Borus Ostrovsky, Daniel R. Cassiday, John R. Feehrer, David A. Wood, Pazhani Pillai, Christopher J. Jackson, Mark D. Hill,
United States Patent 6,826,671 issued November 30, 2004.

2003

Token Coherence: A New Framework for Shared-Memory Multiprocessors,
Milo M.K. Martin, Mark D. Hill and David A. Wood,
IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, November-December 2003.
Paper: pdf
Original ISCA03 Paper: pdf
Token Coherence Bibliography: html

Using Interaction Costs for Microarchitectural Bottleneck Analysis,
Brian A. Fields, Rastislav Bodik, Mark D. Hill, and Chris J. Newburn,
36th International Symposium on Microarchitecture (MICRO), December 2003.
Paper: pdf
Talk: ppt
Expanded TACO 2004 Journal Version: pdf

Challenges in Computer Architecture Evaluation,
Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, and Vijay S. Pai.
IEEE Computer, August 2003.
Paper: pdf

Revisiting "Multiprocessors Should Support Simple Memory Consistency Models"
(Talk to software memory consistency model researchers),
Mark D. Hill,
Dagstuhl Seminar 03431 on Hardware and Software Consistency Models: Programmability and Performance, October 2003.
Abstract: txt
Talk: ppt
Original 1998 Paper: pdf

Token Coherence: Decoupling Performance and Correctness,
Milo M. K. Martin, Mark D. Hill, and David A. Wood,
International Symposium on Computer Architecture (ISCA), June 2003.
Paper: pdf
Reference: ACM
Talk: pdf, ppt
Shorter IEEE Micro Top Picks Paper: pdf
Token Coherence Bibliography: html

Using Destination-Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared Memory Multiprocessors,
Milo M. K. Martin, Pacia J. Harper, Daniel J. Sorin, Mark D. Hill, and David A. Wood,
International Symposium on Computer Architecture (ISCA), June 2003.
Paper: pdf
Reference: ACM
Talk: pdf, ppt

A "Flight Data Recorder" for Enabling Full-system Multiprocessor Deterministic Replay,
Min Xu, Rastislav Bodik and Mark D. Hill
International Symposium on Computer Architecture (ISCA), June 2003.
Paper: pdf
Reference: ACM
Top Picks 2007 follow-on: pdf
Talk: pdf, ppt

Dynamic Verification of End-to-End Multiprocessor Invariants,
Daniel J. Sorin, Mark D. Hill, and David A. Wood,
International Conference on Dependable Systems and Networks (DSN, formerly FTCC), June 2003.
Paper: pdf
Talk: ppt

Simulating a $2M Commercial Server on a $2K PC,
Alaa R. Alameldeen, Milo M.K. Martin, Carl J. Mauer, Kevin E. Moore, Min Xu, Daniel J. Sorin, Mark D. Hill and David A. Wood,
IEEE Computer, February 2003.
Paper: pdf
Talk: ppt

Skewed finite hashing function,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,654,866 issued November 25, 2003.

Repeater for use in a shared memory computing system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,578,071 issued June 10, 2003.

Methods and apparatus for a directory-less memory access protocol in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,574,659 issued June 3, 2003.

2002

Data Page Layouts for Relational Databases on Deep Memory Hierarchies,
Anastassia Ailamaki, David J. DeWitt, and Mark D. Hill,
The VLDB Journal, 11(3), 2002.
Paper: pdf

Full-System Timing-First Simulation,
Carl J. Mauer, Mark D. Hill, and David A. Wood,
ACM SIGMETRICS, June 2002.
Paper: pdf
Reference: ACM
Talk: pdf and ppt

Harnessing Moore's Law
(Talk to computer science undergraduates),
Mark D. Hill,
Several venues, 2002-03.
Abstract: txt
Talk: ppt

SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery,
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, and David A. Wood,
International Symposium on Computer Architecture (ISCA), May 2002.
Paper: pdf
Reference: IEEE
Talk: ppt

Slack: Maximizing Performance Under Technological Constraints,
Brian Fields, Rastislav Bodik, and Mark D. Hill,
International Symposium on Computer Architecture (ISCA), 2002.
Paper: pdf
Reference: IEEE
Talk: ppt

Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol,
Daniel J. Sorin, Manoj Plakal, Anne E. Condon, Mark D. Hill, Milo M. K. Martin and David A. Wood,
IEEE Transactions on Parallel and Distributed Systems, June 2002 (vol 13, number 6).
(Previously available as Dept. of Computer Sciences Technical Report CS-TR-2000-1412, March 2000.)
Paper: pdf
Online protocol examples in html

Bandwidth Adaptive Snooping,
Milo M. K. Martin, Daniel J. Sorin, Mark D. Hill, and David A. Wood,
8th International Symposium on High Performance Computer Architecture (HPCA), February 2002.
Paper: pdf
Talk: pdf and ppt

Evaluating Non-deterministic Multi-threaded Commercial Workloads,
Alaa R. Alameldeen, Carl J. Mauer, Min Xu, Pacia J. Harper, Milo M.K. Martin, Daniel J. Sorin, Mark D. Hill and David A. Wood,
Workshop On Computer Architecture Evaluation using Commercial Workloads (CAECW), February 2002.
Paper: pdf
Talk: pdf and ppt

Hybrid memory access protocol in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,496,854 issued December 17, 2002.

Methods and apparatus for a directory-less memory access protocol in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,377,980 issued April 23, 2002.

2001

Correctly Implementing Value Prediction in Microprocessors that Support Multithreading or Multiprocessing,
Milo M. K. Martin, Daniel J. Sorin, Harold W. Cain, Mark D. Hill, and Mikko H. Lipasti,
34th International Symposium on Microarchitecture (MICRO), December 2001.
Paper: pdf
Talk: pdf and ppt

Weaving Relations for Cache Performance,
Anastassia G. Ailamaki, David J. DeWitt, Mark D. Hill, and Marios Skounakis,
International Conference on Very Large Databases (VLDB), 2001.
Received VLDB 2001 Best Paper Award
Paper: pdf
Talk: ppt

Facile: A Language and Compiler For High-Performance Processor Simulators,
Eric C. Schnarr, James R. Larus, and Mark D. Hill,
Programming Language Design and Implementation (PLDI), 2001.
Paper: pdf
Reference: ACM

Cache Performance for Selected SPEC CPU2000 Benchmarks,
Jason F. Cantin and Mark D. Hill,
Computer Architecture News (CAN), September 2001.
Reference: ACM

Skewed finite hashing function,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,308,246 issued October 23, 2001.

Hybrid memory access protocol in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,243,742 issued June 5, 2001. Also European Union Patent 0818732 and Japanese Patent 10177518.

Shared memory system for symmetric multiprocessor systems,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,226,671 issued May 1, 2001.

2000

Readings in Computer Architecture,
Mark D. Hill, Norman P. Jouppi, and Gurindar S. Sohi, Morgan Kaufmann Publishers, ISBN 1-55860-539-8, 2000. Near-final versions of:
Preface: pdf and ps
Table of Contents: pdf and ps
Web Component: html or html mirror

Making Pointer-Based Data Structures Cache Conscious,
Trishul M. Chilimbi, Mark D. Hill, and James R. Larus,
IEEE Computer, December 2000.
Paper: pdf.

How Computer Architecture Trends May Affect Future Distributed Systems: From InfiniBand Clusters to Inter-Processor Speculation
(Keynote talk for researchers in theoretical aspects distributed systems),
Mark D. Hill,
Symposium on Principles of Distributed Computing (PODC), July 2000.
Abstract: pdf
Talk: ppt

Fast and Portable Parallel Architecture Simulators: Wisconsin Wind Tunnel II,
Shubhendu S. Mukherjee, Steven K. Reinhardt, Babak Falsafi, Mike Litzkow, Steven Huss-Lederman, Mark D. Hill, James R. Larus, and David A. Wood,
IEEE Concurrency, October-December 2000.
Paper: pdf.

Timestamp Snooping: An Approach for Extending SMPs,
Milo M. K. Martin, Daniel J. Sorin, Anastassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, Mark D. Hill, and David A. Wood,
Ninth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), November 2000.
Paper: pdf and ps
Reference: ACM
Talk: pdf

Fast Checkpoint/Recovery to Support Kilo-Instruction Speculation and Hardware Fault Tolerance,
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, and David A. Wood,
Dept. of Computer Sciences Technical Report CS-TR-2000-1420, October 2000.
Technical Report: pdf and ps

Exploiting Market Realities To Address National Security's High-Performance Computing Needs,
Mark D. Hill,
In Defense Science Study Group 1998-1999, Volume 1: Papers 1-13, Institute for Defense Analysis (IDA) Paper P-3531, 2000.
Technical Report: pdf
Talk: ppt

Formation of a National Entity for Information Infrastructure Protection,
Geoffrey C. Orsak, Mark D. Hill, and Robin R. Murphy,
In Defense Science Study Group 1998-1999, Volume 1: Papers 1-13, Institute for Defense Analysis (IDA) Paper P-3531, 2000.
Technical Report: pdf

1999

DBMSs on a modern processor: Where does time go?,
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill, and David A. Wood,
International Conference on Very Large Databases (VLDB), September 1999.
Paper: pdf and ps
Talk: ppt

A System-Level Specification Framework for I/O Architectures,
Mark D. Hill, Anne E. Condon, Manoj Plakal, and Daniel J. Sorin,
Symposium on Parallel Algorithms and Architectures (SPAA), June 1999.
Paper: pdf and ps
Talk: pdf and ps
Extended Technical Report: pdf and ps
Reference: ACM

Multicast Snooping: A New Coherence Method Using a Multicast Address Network,
E. Ender Bilir, Ross M. Dickson, Ying Hu, Manoj Plakal, Daniel J. Sorin, Mark D. Hill, and David A. Wood.
International Symposium on Computer Architecture (ISCA), May 1999.
Paper: pdf and ps
Reference: ACM
Talk: pdf and ps

Cache-Conscious Structure Layout,
Trishul M. Chilimbi, James R. Larus, and Mark D. Hill,
Programming Language Design and Implementation (PLDI), 1999.
Paper: pdf and ps. Reference: ACM

Using Lamport Clocks to Reason About Relaxed Memory Models,
Anne E. Condon, Mark D. Hill, Manoj Plakal and Daniel J. Sorin,
International Symposium on High-Performance Computer Architecture (HPCA), January 1999.
Paper: pdf and ps
Talk: pdf and ps

Cachable interface control registers for high speed data transfer,
David A. Wood, Steven K. Reinhardt, Shubhendu S. Mukherjee, Babak Falsafi, Mark D. Hill, and Robert W. Pfile,
United States Patent 5,951,657 issued September 14, 1999.

Methods and apparatus for substantially memory-less coherence transformer for connecting computer node coherence domains,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,940,860 issued August 17, 1999. Also European Union Patent 0817068 and Japanese Patent 11003277.

Split-SMP computer system configured to operate in a protected mode having repeater which inhibits transaction to local address partition,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,923,847 issued July 13, 1999. Also European Union Patent 0817094 and Japanese Patent 10187646.

Skip-level write-through in a multi-level memory of a computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,903,907 issued May 11, 1999. Also European Union Patent 0817079 and Japanese Patent 11003280.

Efficient allocation of cache memory space in a computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,893,150 issued April 6, 1999. Also European Union Patent 0817078 and Japanese Patent 10214229.

Multiprocessor system configured to detect and efficiently provide for migratory data access patterns,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,734,922 issued March 31, 1999.

Method and apparatus for a directory-less memory access protocol in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,873,117 issued February 16, 1999. Also European Union Patent 0817067 and Japanese Patent 10134009.

Hybrid memory access protocol for servicing memory access request by ascertaining whether the memory block is currently cached in determining which protocols to be used,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,864,671 issued January 26, 1999.

Hierarchical SMP computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,862,357 issued January 19, 1999. Also European Union Patent 0817060 and Japanese Patent 10187630.

Methods and apparatus for a coherence transformer for connecting computer system coherence domains,
Erik E. Hagersten, Mark D. Hill, and David A. Wood,
United States Patent 5,860,109 issued January 12, 1999. Also European Union Patent 0817065 and Japanese Patent 10214222.

1998

Guest Editor's Introduction: Design Challenges for High-Performance Network Interfaces
Andrew A. Chien, Mark D. Hill, and Shubhendu S. Mukherjee,
IEEE Computer, November 1998.
Paper: pdf.

Making Network Interfaces Less Peripheral,
Shubhendu S. Mukherjee and Mark D. Hill,
IEEE Computer, October 1998.
Paper: pdf.

Sirocco: Cost-Effective Fine-Grain Distributed Shared Memory,
Ioannis Schoinas, Babak Falsafi, Mark D. Hill, James R. Larus, and David A. Wood,
International Conference on Parallel Architectures and Compilation Techniques (PACT 98), October 1998.
Paper: pdf and ps

A Retrospective on "Weak Ordering -- A New Definition,"
Sarita V. Adve and Mark D. Hill,
Selected Papers from the First 25 International Symposia on Computer Architecture (Gurindar S. Sohi, editor, ACM Press), 1998.
Paper: pdf and ps.
Reference: ACM

Multiprocessors Should Support Simple Memory Consistency Models,
Mark D. Hill,
IEEE Computer, August 1998.
Paper: pdf
2003 Dagstuhl Retrospective Talk: ppt

Lamport Clocks: Verifying A Directory Cache-Coherence Protocol,
Manoj Plakal, Daniel J. Sorin, Anne E. Condon and Mark D. Hill,
Symposium on Parallel Algorithms and Architectures (SPAA), June 1998.
Paper: pdf and ps
Reference: ACM
Talk: pdf and ps

Using Prediction to Accelerate Coherence Protocols,
Shubhendu S. Mukherjee and Mark D. Hill,
International Symposium on Computer Architecture (ISCA), 1998.
Paper: pdf and ps. Reference: ACM

The Impact of Data Transfer and Buffering Alternatives on Network Interface Design,
Shubhendu S. Mukherjee and Mark D. Hill,
International Symposium on High-Performance Computer Architecture (HPCA), 1998.
Paper: pdf and ps

Address Translation Mechanisms in Network Interfaces,
Ioannis Schoinas and Mark D. Hill,
International Symposium on High-Performance Computer Architecture (HPCA), 1998.
Paper: pdf and ps

Methods and apparatus for sharing stored data objects in a computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,835,906 issued November 10, 1998. Also European Union Patent 0817040 and Japanese Patent 10187527.

Methods and apparatus for a coherence transformer with limited memory for connecting computer system coherence domains,
Erik E. Hagersten, Mark D. Hill, and David A. Wood,
United States Patent 5,829,034 issued October 27, 1998. Also European Union Patent 0817069 and Japanese Patent 10187633.

Efficient storage of data in computer systmes with multiple cache levels,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,802,563 issued September 1, 1998. Also European Union Patent 0817080 and Japanese Patent 10214224.

Extended symmetrical multiprocessor address mapping,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,796,605 issued August 18, 1998. (I was officially added as a co-inventor on June 27, 1998, correcting a filing error.)

Extended symmetrical multiprocessor architecture,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,754,877 issued May 19, 1998. Also European Union Patent 0817092 and Japanese Patent 10097513.

Multiprocessing system configured to detect and efficiently provide for migratory data access patterns,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,734,922 issued March 31, 1998. Also European Union Patent 0817071 and Japanese Patent 10143483.

1997

Relaxed Consistency and Coherence Granularity in DSM Systems: A Performance Evaluation,
Yuanyuan Zhou, Liviu Iftode, Jaswinder Pal Singh, Kai Li, Brian R. Toonen, Ioannis Schoinas, Mark D. Hill, and David A. Wood,
SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), June 1997.
Paper: pdf and ps.
Reference: ACM

1996

Parallel Computer Research in the Wisconsin Wind Tunnel Project,
Mark D. Hill, James R. Larus, and David A. Wood,
NSF Conference on Experimental Research in Computer Systems, June 1996.
Paper: pdf and ps

Bidirectional Technology Transfer: Sabbaticals in Industry,
Mark D. Hill,
NSF Conference on Experimental Research in Computer Systems, June 1996. Reprinted in Computing Research News, November 1997.
Paper: pdf and ps

Coherent Network Interfaces for Fine-Grain Communication,
Shubhendu S. Mukherjee, Babak Falsafi, Mark D. Hill, and David A. Wood,
International Symposium on Computer Architecture (ISCA), 1996.
Paper: pdf and ps. Reference: ACM

Optimistic Simulation of Parallel Architectures Using Program Executables,
Sashikanth Chandrasekaran and Mark D. Hill,
Workshop on Parallel and Distributed Simulation (PADS), May 1996.
Paper: pdf and ps. Reference: ACM

1995

A New Page Table for 64-bit Address Spaces,
Madhusudhan Talluri, Mark D. Hill, and Yousef A. Khalidi,
Symposium on Operating Systems Principals (SOSP), December 1995.
Paper: pdf and ps

Presidential Young Investigator Award Final Report,
Mark D. Hill,
July 1995.
Paper: pdf and ps

Efficient Support for Irregular Applications on Distributed-Memory Machines,
Shubhendu S. Mukherjee, Shamik D. Sharma, Mark D. Hill, James R. Larus, Anne Rogers, and Joel Saltz,
SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), July 1995.
Paper: pdf and ps. Reference: ACM

Cost-Effective Parallel Computing,
David A. Wood and Mark D. Hill,
IEEE Computer, February 1995.
Paper: final scanned pdf and near-final latex pdf.

Solving Microstructure Electrostatics on a Proposed Parallel Computer,
Frank Traenkle, Mark D. Hill, and Sangtae Kim,
Computers and Chemical Engineering, 1995.
Paper: pdf and ps

1994

Application-Specific Protocols for User-Level Shared Memory,
Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, Ioannis Schoinas, Mark D. Hill James R. Larus, Anne Rogers, and David A. Wood,
Supercomputing '94, Nov. 1994.
Paper: pdf and ps.
Reference: ACM

Surpassing the TLB Performance of Superpages with Less Operating System Support,
Madhusudhan Talluri and Mark D. Hill,
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 1994.
Paper: pdf and ps
Reference: ACM

An Evaluation of Directory Protocols for Medium-Scale Shared-Memory Multiprocessors,
Shubhendu S. Mukherjee and Mark D. Hill,
International Conference on Supercomputing (ICS), July 1994.
Paper: pdf and ps.
Reference: ACM

A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches,
R. E. Kessler, Mark D. Hill, and David A. Wood,
IEEE Transactions on Computers, June 1994.
Paper: pdf and ps

1993

Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors,
Mark D. Hill, James R. Larus, Steven K. Reinhardt, and David A. Wood,
ACM Transactions on Computer Systems (TOCS), November 1993.
Updated version of ASPLOS 1992 paper.
Paper: final scanned pdf and near-final latex pdf.
Reference: ACM

Wisconsin Architectural Research Tool Set (WARTS),
Mark D. Hill, James R. Larus, Alvin R. Lebeck, Madhusudhan Talluri, and David A. Wood,
Computer Architecture News (CAN), August 1993.
Web Site: pdf
Paper: pdf
Reference: ACM

Cache Performance of the SPEC92 Benchmark Suite,
Jeffrey D. Gee, Mark D. Hill, Dionisios N. Pnevmatikatos, and Alan Jay Smith,
IEEE Micro, August 1993.
Paper: pdf and ps
Reference: ACM

A Unified Formalization of Four Shared-Memory Models,
Sarita V. Adve and Mark D. Hill,
IEEE Transactions on Parallel and Distributed Systems (TPDS), June 1993.
Paper: final scanned pdf and near-final troff pdf

Performance Implications of Tolerating Cache Faults,
Andreas Farid Pour and Mark D. Hill,
IEEE Transactions on Computers (TOC), March 1993.
Paper: final scanned pdf and near-final troff pdf

Mechanisms for Cooperative Shared Memory,
David A. Wood, Satish Chandra, Babak Falsafi, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, Shubhendu S. Mukherjee, Subbarao Palacharla, and Steven K. Reinhardt,
International Symposium on Computer Architecture (ISCA), May 1993.
Paper: pdf and ps
Reference: ACM

The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers,
Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, and David A. Wood,
ACM SIGMETRICS, May 1993.
Paper: pdf and ps
Reference: ACM

1992

Page Placement Algorithms for Large Real-Index Caches,
R. E. Kessler and Mark D. Hill,
ACM Transactions on Computer Systems, November 1992.
Paper: final scanned pdf and near-final troff pdf
Reference: ACM

Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors,
Mark D. Hill, James R. Larus, Steven K. Reinhardt, and David A. Wood,
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 1992.
Recommended for ACM Transactions on Computer Systems (TOCS), November 1993.
Paper: pdf and updated scanned pdf
Reference: ACM

Programming for Different Memory Consistency Models,
Kourosh Gharachorloo, Sarita V. Adve, Anoop Gupta, John L. Hennessy, and Mark D. Hill,
Journal of Parallel and Distributed Computing, August 1992.
Paper: pdf and ps

Tradeoffs in Supporting Two Page Sizes,
Madhusudhan Talluri, Shing Kong, Mark D. Hill, and David A. Patterson,
International Symposium on Computer Architecture (ISCA), May 1992.
Paper: pdf and ps
Reference: ACM

1991

Detecting Data Races on Weak Memory Systems,
Sarita V. Adve, Mark D. Hill, Barton P. Miller, and Robert H. B. Netzer,
International Symposium on Computer Architecture (ISCA), June 1991.
Paper: pdf and ps
Reference: ACM

Comparison of Hardware and Software Cache Coherence Schemes,
Sarita V. Adve, Vikram S. Adve, Mark D. Hill, and Mary K. Vernon,
International Symposium on Computer Architecture (ISCA), June 1991.
Paper: pdf and ps
ACM

A Model for Estimating Trace-Sample Miss Ratios,
David A. Wood, Mark D. Hill, and R. E. Kessler
ACM SIGMETRICS, May 1991.
Paper: pdf and ps
Reference: ACM

Implementing Stack Simulation for Highly-Associative Memories (extended abstract)
Yul H. Kim, Mark D. Hill, and David A. Wood,
ACM SIGMETRICS, May 1991.
Paper: pdf and ps

1990

Implementing Sequential Consistency In Cache-Based Systems,
Sarita V. Adve and Mark D. Hill,
International Conference on Parallel Processing, August 1990.
Paper: pdf and ps

Weak Ordering - A New Definition,
Sarita V. Adve and Mark D. Hill,
International Symposium on Computer Architecture (ISCA), June 1990.
Paper: pdf and ps. Reference: ACM

Cache Considerations for Multiprocessor Programmers,
Mark D. Hill and James R. Larus,
Communications of the ACM (CACM), August 1990.
Paper: scanned pdf (3.2 MB for a scan of 6 pages!).
Reference: ACM

What is Scalability?,
Mark D. Hill
ACM SIGARCH Computer Architecture News, December 1990.
Paper: pdf Reference: ACM

Cache performance of the integer SPEC benchmarks on a RISC,
Mark D. Hill and Dionisios N. Pnevmatikatos
ACM SIGARCH Computer Architecture News, June 1990.
Paper: pdf Reference: ACM

1989

Evaluating Associativity in CPU Caches,
Mark D. Hill and Alan Jay Smith,
IEEE Transactions on Computers (TOC), December 1989.
Paper: scanned pdf.

A VLSI Chip Set for a Multiprocessor Workstation - Part I: A RISC Microprocessor with Coprocessor Interface and Support for Symbolic Processing,
David D. Lee, Shing I. Kong, Mark D. Hill, George S. Taylor, David A. Hodges, Randy H. Katz, and David A. Patterson,
IEEE Journal of Solid State Circuits (JSSC), December 1989.
Paper: scanned pdf.

Inexpensive Implementations of Set-Associativity,
R. E. Kessler, Richard Jooss, Alvin Lebeck, and Mark D. Hill,
International Symposium on Computer Architecture (ISCA), June 1989.
Paper: pdf

Test Driving Your Next Cache,
Mark D. Hill,
Magazine of Intellignet Personal Systems (MIPS), August 1989.
Paper: scanned pdf

1988

A Case for Direct-Mapped Caches,
Mark D. Hill,
IEEE Computer, December 1988.
Paper: scanned pdf (2 MB)

1987

Aspects of Cache Memory and Instruction Buffer Performance,
Mark D. Hill,
Ph.D. Thesis,
University of California, Berkeley, Dept. of Computer Sciences Technical Report CSD-87-381, November 1987.
Thesis: scanned pdf (175 MB!), winzip archive with pdf (20 MB), gzipped pdf (20 MB), and html pointer to Berkeley TR.

1986

Design Decisions in SPUR,
M. D. Hill, S. J. Eggers, J. R. Larus, G. S. Taylor, G. Adams, B. K. Bose, G. A. Gibson, P. M. Hansen, J. Keller, S. I. Kong, C. G. Lee, D. Lee, J. M. Pendleton, S. A. Ritchie, D. A. Wood, B. G. Zorn, P. N. Hilfinger, D. Hodges, R. H. Katz, J. Ousterhout, and D. A. Patterson,
IEEE Computer, November 1986.
Paper: scanned pdf

An In-Cache Address Translation Mechanism,
David A. Wood, Susan J. Eggers, Garth Gibson, Mark D. Hill, Joan Pendleton, Scott A. Ritchie, Randy H. Katz, and David A. Patterson,
International Symposium on Computer Architecture (ISCA), June 1986.
Paper: scanned pdf

1985

No papers.

1984

Experimental Evaluation of On-Chip Microprocessor Cache Memories,
Mark D. Hill and Alan J. Smith,
International Symposium on Computer Architecture (ISCA), June 1984.
Paper: scanned pdf.

1983

Architecture of a VLSI Instruction Cache,
David A. Patterson, Phil Garrison, Mark D. Hill, Dimitris Lioupis, Chris Nyberg, Tim N. Sippel, and Korbin S. Van Dyke,
International Symposium on Computer Architecture (ISCA), June 1983.
Paper: scanned pdf.