CS/ECE 552 Introduction to Computer Architecture Spring 2012 Section 1 Instructor David A. Wood and T. A. Ramkumar Ravikumar URL: http://www.cs.wisc.edu/~david/courses/cs552/S12/

CS/ECE 552 : Introduction to Computer Architecture
Spring 2012
Prof. Wood
Problem Set #2

Due: Wed, Feb. 22, 2012
Approximate Weight : 20% of homework grade

You should do this assignment alone

Note that for this assignment, it is no longer necessary to use the nand/nor/xor/not modules provided. You may use the Verilog primitives freely (as long as they follow the Use of Verilog document).

You can find the PDF copies of Dicussion session 3 and Discussion session 4. Problems 6 and 7 for this HW can be found here

Instructions on how to use handin for this assignment is given at the bottom of the page. Submission guidelines are given for each problem

Problem 1 (20 points)

Design a 16-bit barrel shifter with the following interface.

Module Name: shift_16

Inputs:

• In[15:0] - 16 bit input operand value to be shifted

• Cnt[3:0] - 4 bit amount to shift (number of bit positions to shift)

• Op[1:0] - shift type, see encoding in table below

Output:

• Out[15:0] - 16 bit output operand

You should use Verilog to do this homework. Before starting to write any verilog, I suggest the following:

1. Break down your design into sub-modules.

2. Define interfaces between these modules

3. Draw paper and pencil schematics for these modules

4. Then start writing verilog

Verify the design using representative inputs.

What to submit:

1. Turn in neatly and legibly drawn schematics of your design.

2. Annotated simulation trace of the complete design. Pick representative cases for your simulation input to turn in.

3. Explain your choice of inputs and why they are representative.

4. Electronically submit your verilog source code. You are required to submit all *.v files, your testbench and the Vcheck output files as well

2.  Problem 2 (30 points)

This problem should also be done in Verilog. Design a simple 16-bit ALU. Operations to be performed are 2's Complement ADD, bitwise-OR, bitwise-XOR, bitwise-AND, and the shift unit from problem 1. In addition, it must have the ability to invert either of its data inputs before performing the operation and have a carry-in input (to enable subtraction). Another input line also determines whether the arithmetic to be performed is signed or unsigned . Use a carry look-ahead adder (CLA) in your design. (Hint: First design a 4-bit CLA. Then use blocks of this CLA for designing the 16-bit CLA.)

The external interface of the ALU should be:

Name: ALU

Inputs

• A[15:0], B[15:0] - Data input lines A and B (16 bits each.)

• Cin - A carry-in for the LSB of the adder.

• Op[2:0] - The OP code (3 bits.) The OP code determines the operation to be performed. The opcodes are shown in the Table above.

• invA - An invert-A input (active high) that causes the A input to be inverted before the operation is performed.

• invB - An invert-B input (active high) that causes the B input to be inverted before the operation is performed.

• sign - A signed-or-unsigned input (active high for signed) that indicates whether signed or unsigned arithmetic to be performed for ADD function on the data lines. (This affects the OFL output.)

Outputs

• Out[15:0] - Data out (16 bits.)

• OFL - (1 bit) This indicates high if an overflow occurred.

• Zero - (1 bit) This indicates that the result is exactly zero.

Other assumptions:

• You can assume 2's complement numbers.

• In case of logic functions, OFL is not asserted (i.e. kept logic low).

• For the shifter, the input InA is to be shifted by an amount represented by bits [3:0] of B

Use hierarchical design and simulate each block by itself before you try the complete design. You must reuse the shift unit designed in Problem 1.

What to submit:

1. Neatly and legibly drawn schematics, hand-drawn is fine

2. Annotated simulation trace output of the complete design. Pick representative cases for your simulation input.

3. You should explain why your inputs are representative.

4. Electronically submit your verilog source code. You are required to submit all *.v files, your testbench and the Vcheck output files as well

3.  Problem 3 (6 points)

Translate the following code from C into MIPS instructions. Assume that the variables a, b, c, and d are defined as 32-bit integers in a C program.

   c = a + b;
   d = c - b;
   a = c + d;

Assume a is stored in $t1, b is stored in $t2, c is in $t3, and d is in $t4.

4.  Problem 4 (6 points)

Implement the following C code in MIPS:

   for (i=0; i <= 10; i++) {
       a[i] = b[i] - c;
   }

Assume that the base address of array a is in $a0, and the base address of array b is in $b0. The variable i is present in $t0 and c is present in $s0

a) If there is no out-of-bounds exception, how many instructions are executed in total when this program is run

b) How many memory data references are made during the execution of this program?

5.  Problem 5 (6 points)

Assume the following instruction mix for a MIPS like RISC instruction

a) Given that the total number of instructions in the program is 200, compute the overall CPI

b) To improve the CPI, an architect decides to convert 50% of the multiplies into shift-add sequences which have an average length of 3.5 cycles. Compute the new CPI

6.  Problem 6 (6 points)

Problems 1.6.4-1.6.6 on page 63 of COD4e (2011 Print)

7.  Problem 7 (6 points)

Problems 1.13.1-1.13.3 on page 69 of COD4e (2011 Print)

8.  Problem 8 (20 points)

Understanding ISAs. In this problem you will get to lightly analyze the x86 and use some system software tools.

1. You will first compile a simple C program and generate a binary.

2. Disassemble the program (i.e.) look at the instructions generated.

3. Annotate the disassembled program and map this back to the original C source code.

Use ONLY the CS Linux machines for this problem.

Type in the following program and name it sum.c

int main(void) {
        int i, sum;
        sum = 0;
        for (i = 0; i < 24; i++) {
                sum += i;
        }
        return sum;
}

Compile this program using gcc, by doing the following at the linux prompt.

prompt % gcc -O0 sum.c -o sum.exe

sum.exe is the binary generated. The -O0 flag disables all compiler optimizations. We will now look at the instructions the compiler generated for us. A tool called objdump does this. At the linux prompt:

prompt % objdump --disassemble sum.exe

You will see a lot of output - close to 250 lines. Search for the string "<main>" which will show the assembly language source code for the function main in our program. The first column is the address in the program, the 2nd column lists the actual bytes that represent each instruction (you will notice the variable lengths here), and the 3rd column is the assembly language instructions.

Annotate each instruction with what it is doing and map them back to the few lines of C-source code.

x86 ISA reference:

• Intel® 64 and IA-32 Architectures Software Developer's Manual

Volume 1: Basic Architecture. pdf download

• Intel® 64 and IA-32 Architectures Software Developer's Manual

Volume 2A: Instruction Set Reference, A-M Describes the format of the instruction and provides reference pages for instructions (from A to M). This volume also contains the table of contents for both Volumes 2A and 2B. pdf download

• Intel® 64 and IA-32 Architectures Software Developer's Manual

Volume 2B: Instruction Set Reference, N-Z Provides reference pages for instructions (from N to Z). VMX instructions are treated in a separate chapter. This volume also contains the appendices and index support for Volumes 2A and 2B. pdf download

• More Intel manuals here

What you must submit.

1. Read up on what objdump is and describe what it does in a few lines.

2. Print the assembly language source code and annotate it with your comments on how each instructions maps back to the source code.

3. Bonus question 1: Compile the program with -O3 (enabling all compiler optimizations), execute objdump, and examine the code for main. You will notice far fewer instructions. Explain what the instructions are doing now and why are there fewer instructions.

4. Bonus question 2: Why does the program binary have close to 250 instructions for the few lines of C-source code? What are the instructions outside of the main function doing?

What to handin

Hand in your homework using the CS handin program.

• Make a folder for each problem (hw2_1 and hw2_2)
• Each folder should contain all the verilog files for that problem.
• name and signals for the top level module should be :
  problem1: shift_16( In, Cnt, Op, Out);
  problem2: ALU( A, B, Cin, Op, invA, invB, sign, Out, OFL, Zero);
  
• tar these 2 folders to 'cs username'.tar [example : tar cvf ram.tar hw2_1 hw2_2]
• Copy the tar file over to an empty folder and submit it using handin documentation [example: mkdir ram; mv ram.tar ram]
  * <class_name> cs552-1
  * <assignment_name> HW2
  * <directory_path> 'location_of_the folder_you_created'