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DMASequencer.hh
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2  * Copyright (c) 2008 Mark D. Hill and David A. Wood
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28 
29 #ifndef __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
30 #define __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
31 
32 #include <memory>
33 #include <ostream>
34 #include <unordered_map>
35 
36 #include "mem/protocol/DMASequencerRequestType.hh"
40 #include "params/DMASequencer.hh"
41 
42 struct DMARequest
43 {
44  DMARequest(uint64_t start_paddr, int len, bool write, int bytes_completed,
45  int bytes_issued, uint8_t *data, PacketPtr pkt);
46 
47  uint64_t start_paddr;
48  int len;
49  bool write;
52  uint8_t *data;
54 };
55 
56 class DMASequencer : public RubyPort
57 {
58  public:
59  typedef DMASequencerParams Params;
60  DMASequencer(const Params *);
61  void init() override;
62 
63  /* external interface */
64  RequestStatus makeRequest(PacketPtr pkt) override;
65  bool busy() { return m_outstanding_count > 0; }
66  int outstandingCount() const override { return m_outstanding_count; }
67  bool isDeadlockEventScheduled() const override { return false; }
68  void descheduleDeadlockEvent() override {}
69 
70  /* SLICC callback */
71  void dataCallback(const DataBlock &dblk, const Addr &addr);
72  void ackCallback(const Addr &addr);
73 
74  void recordRequestType(DMASequencerRequestType requestType);
75 
76  private:
77  void issueNext(const Addr &addr);
78 
80 
81  typedef std::unordered_map<Addr, DMARequest> RequestTable;
83 
86 };
87 
88 #endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
uint8_t * data
Definition: DMASequencer.hh:52
int outstandingCount() const override
Definition: DMASequencer.hh:66
int bytes_completed
Definition: DMASequencer.hh:50
ip6_addr_t addr
Definition: inet.hh:335
RequestStatus makeRequest(PacketPtr pkt) override
Definition: DMASequencer.cc:65
DMASequencerParams Params
Definition: DMASequencer.hh:59
DMASequencer(const Params *)
Definition: DMASequencer.cc:48
PacketPtr pkt
Definition: DMASequencer.hh:53
int bytes_issued
Definition: DMASequencer.hh:51
void recordRequestType(DMASequencerRequestType requestType)
uint64_t m_data_block_mask
Definition: DMASequencer.hh:79
void dataCallback(const DataBlock &dblk, const Addr &addr)
std::unordered_map< Addr, DMARequest > RequestTable
Definition: DMASequencer.hh:81
RequestTable m_RequestTable
Definition: DMASequencer.hh:82
bool isDeadlockEventScheduled() const override
Definition: DMASequencer.hh:67
void issueNext(const Addr &addr)
MemObjectParams Params
Definition: mem_object.hh:63
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:245
DMARequest(uint64_t start_paddr, int len, bool write, int bytes_completed, int bytes_issued, uint8_t *data, PacketPtr pkt)
Definition: DMASequencer.cc:39
void ackCallback(const Addr &addr)
uint64_t start_paddr
Definition: DMASequencer.hh:47
int m_max_outstanding_requests
Definition: DMASequencer.hh:85
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: DMASequencer.cc:55
int m_outstanding_count
Definition: DMASequencer.hh:84
void descheduleDeadlockEvent() override
Definition: DMASequencer.hh:68

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