armv8_cpu.hh

Go to the documentation of this file.

/*
 * Copyright (c) 2015, 2017 ARM Limited
 * All rights reserved
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
 * unmodified and in its entirety in all distributions of the software,
 * modified or unmodified, in source code or in binary form.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Authors: Andreas Sandberg
 */

#ifndef __ARCH_ARM_KVM_ARMV8_CPU_HH__
#define __ARCH_ARM_KVM_ARMV8_CPU_HH__

#include <vector>

#include "arch/arm/intregs.hh"
#include "arch/arm/kvm/base_cpu.hh"
#include "arch/arm/miscregs.hh"

struct ArmV8KvmCPUParams;

class ArmV8KvmCPU : public BaseArmKvmCPU
{
  public:
    ArmV8KvmCPU(ArmV8KvmCPUParams *params);
    virtual ~ArmV8KvmCPU();

    void startup() override;

    void dump() const override;

  protected:
    void updateKvmState() override;
    void updateThreadContext() override;

  protected:
    struct IntRegInfo {
        IntRegInfo(uint64_t _kvm, IntRegIndex _idx, const char *_name)
            : kvm(_kvm), idx(_idx), name(_name) {}

        uint64_t kvm;
        IntRegIndex idx;
        const char *name;
    };

    struct MiscRegInfo {
        MiscRegInfo(uint64_t _kvm, MiscRegIndex _idx, const char *_name)
            : kvm(_kvm), idx(_idx), name(_name) {}

        uint64_t kvm;
        MiscRegIndex idx;
        const char *name;
    };

    const std::vector<ArmV8KvmCPU::MiscRegInfo> &getSysRegMap() const;

    static const std::vector<ArmV8KvmCPU::IntRegInfo> intRegMap;
    static const std::vector<ArmV8KvmCPU::MiscRegInfo> miscRegMap;
    static const std::vector<ArmV8KvmCPU::MiscRegInfo> miscRegIdMap;

    mutable std::vector<ArmV8KvmCPU::MiscRegInfo> sysRegMap;
};

#endif // __ARCH_ARM_KVM_ARMV8_CPU_HH__