| aarch64FaultSources | ArmISA::ArmFault | static |
| abortDisable(ThreadContext *tc) | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| AccessFlagLL enum value | ArmISA::ArmFault | |
| AddressSizeLL enum value | ArmISA::ArmFault | |
| AlignmentFault enum value | ArmISA::ArmFault | |
| annotate(AnnotationIDs id, uint64_t val) | ArmISA::ArmFault | inlinevirtual |
| AnnotationIDs enum name | ArmISA::ArmFault | |
| AR enum value | ArmISA::ArmFault | |
| ArmFault(ExtMachInst _machInst=0, uint32_t _iss=0) | ArmISA::ArmFault | inline |
| ArmFaultVals(ExtMachInst _machInst=0, uint32_t _iss=0) | ArmISA::ArmFaultVals< UndefinedInstruction > | inline |
| armPcElrOffset() | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| armPcOffset(bool isHyp) | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| AsynchPtyErrOnMemoryAccess enum value | ArmISA::ArmFault | |
| AsynchronousExternalAbort enum value | ArmISA::ArmFault | |
| countStat() | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| DebugEvent enum value | ArmISA::ArmFault | |
| disabled | ArmISA::UndefinedInstruction | protected |
| DomainLL enum value | ArmISA::ArmFault | |
| ec(ThreadContext *tc) const | ArmISA::UndefinedInstruction | virtual |
| FaultSource enum name | ArmISA::ArmFault | |
| FaultSourceInvalid enum value | ArmISA::ArmFault | |
| fiqDisable(ThreadContext *tc) | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| from64 | ArmISA::ArmFault | protected |
| fromEL | ArmISA::ArmFault | protected |
| fromMode | ArmISA::ArmFault | protected |
| getFaultAddrReg64() const | ArmISA::ArmFault | |
| getFsr(ThreadContext *tc) | ArmISA::ArmFault | inlinevirtual |
| getSyndromeReg64() const | ArmISA::ArmFault | |
| getVector(ThreadContext *tc) | ArmISA::ArmFault | protected |
| getVector64(ThreadContext *tc) | ArmISA::ArmFault | protected |
| InstructionCacheMaintenance enum value | ArmISA::ArmFault | |
| invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) | ArmISA::UndefinedInstruction | virtual |
| invoke64(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) | ArmISA::ArmFault | |
| iss() const | ArmISA::UndefinedInstruction | virtual |
| issRaw | ArmISA::ArmFault | protected |
| isStage2() const | ArmISA::ArmFault | inlinevirtual |
| longDescFaultSources | ArmISA::ArmFault | static |
| LpaeTran enum value | ArmISA::ArmFault | |
| machInst | ArmISA::ArmFault | protected |
| mnemonic | ArmISA::UndefinedInstruction | protected |
| name() const | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| nextMode() | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| NumFaultSources enum value | ArmISA::ArmFault | |
| offset(ThreadContext *tc) | ArmISA::ArmFaultVals< UndefinedInstruction > | virtual |
| offset64() | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| OVA enum value | ArmISA::ArmFault | |
| overrideEc | ArmISA::UndefinedInstruction | protected |
| PermissionLL enum value | ArmISA::ArmFault | |
| PrefetchTLBMiss enum value | ArmISA::ArmFault | |
| PrefetchUncacheable enum value | ArmISA::ArmFault | |
| routeToHyp(ThreadContext *tc) const | ArmISA::UndefinedInstruction | virtual |
| routeToMonitor(ThreadContext *tc) const | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| S1PTW enum value | ArmISA::ArmFault | |
| SAS enum value | ArmISA::ArmFault | |
| setSyndrome(ThreadContext *tc, MiscRegIndex syndrome_reg) | ArmISA::ArmFault | virtual |
| SF enum value | ArmISA::ArmFault | |
| shortDescFaultSources | ArmISA::ArmFault | static |
| SRT enum value | ArmISA::ArmFault | |
| SSE enum value | ArmISA::ArmFault | |
| SynchExtAbtOnTranslTableWalkLL enum value | ArmISA::ArmFault | |
| SynchPtyErrOnMemoryAccess enum value | ArmISA::ArmFault | |
| SynchPtyErrOnTranslTableWalkLL enum value | ArmISA::ArmFault | |
| SynchronousExternalAbort enum value | ArmISA::ArmFault | |
| thumbPcElrOffset() | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| thumbPcOffset(bool isHyp) | ArmISA::ArmFaultVals< UndefinedInstruction > | inlinevirtual |
| TLBConflictAbort enum value | ArmISA::ArmFault | |
| to64 | ArmISA::ArmFault | protected |
| toEL | ArmISA::ArmFault | protected |
| TranMethod enum name | ArmISA::ArmFault | |
| TranslationLL enum value | ArmISA::ArmFault | |
| UndefinedInstruction(ExtMachInst _machInst, bool _unknown, const char *_mnemonic=NULL, bool _disabled=false) | ArmISA::UndefinedInstruction | inline |
| UndefinedInstruction(ExtMachInst _machInst, uint32_t _iss, ExceptionClass _overrideEc, const char *_mnemonic=NULL) | ArmISA::UndefinedInstruction | inline |
| unknown | ArmISA::UndefinedInstruction | protected |
| UnknownTran enum value | ArmISA::ArmFault | |
| vals | ArmISA::ArmFaultVals< UndefinedInstruction > | protectedstatic |
| VmsaTran enum value | ArmISA::ArmFault | |
