gem5
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Groups Pages
CacheMemory Member List

This is the complete list of members for CacheMemory, including all inherited members.

_paramsSimObjectprotected
addressToCacheSet(Addr address) const CacheMemoryprivate
allocate(Addr address, AbstractCacheEntry *new_entry, bool touch)CacheMemory
allocate(Addr address, AbstractCacheEntry *new_entry)CacheMemoryinline
allocateVoid(Addr address, AbstractCacheEntry *new_entry)CacheMemoryinline
cacheAvail(Addr address) const CacheMemory
CacheMemory(const Params *p)CacheMemory
CacheMemory(const CacheMemory &obj)CacheMemoryprivate
cacheProbe(Addr address) const CacheMemory
checkResourceAvailable(CacheResourceType res, Addr addr)CacheMemory
ckptCountSerializablestatic
ckptMaxCountSerializablestatic
ckptPrevCountSerializablestatic
clearLocked(Addr addr)CacheMemory
currentSection()Serializablestatic
dataArrayCacheMemoryprivate
deallocate(Addr address)CacheMemory
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() const Drainableinline
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() const EventManagerinline
find(const char *name)SimObjectstatic
findTagInSet(int64_t line, Addr tag) const CacheMemoryprivate
findTagInSetIgnorePermissions(int64_t cacheSet, Addr tag) const CacheMemoryprivate
getAddressAtIdx(int idx) const CacheMemory
getCacheAssoc() const CacheMemoryinline
getCacheSize() const CacheMemoryinline
getDataLatency() const CacheMemoryinline
getNumBlocks() const CacheMemoryinline
getProbeManager()SimObject
getReplacementWeight(int64_t set, int64_t loc)CacheMemory
getTagLatency() const CacheMemoryinline
init()CacheMemoryvirtual
initState()SimObjectvirtual
isBlockInvalid(int64_t cache_set, int64_t loc)CacheMemory
isBlockNotBusy(int64_t cache_set, int64_t loc)CacheMemory
isLocked(Addr addr, int context)CacheMemory
isTagPresent(Addr address) const CacheMemory
loadState(CheckpointIn &cp)SimObjectvirtual
lookup(Addr address)CacheMemory
lookup(Addr address) const CacheMemory
m_accessModeTypeCacheMemory
m_block_sizeCacheMemoryprivate
m_cacheCacheMemoryprivate
m_cache_assocCacheMemoryprivate
m_cache_num_set_bitsCacheMemoryprivate
m_cache_num_setsCacheMemoryprivate
m_cache_sizeCacheMemoryprivate
m_demand_accessesCacheMemory
m_demand_hitsCacheMemory
m_demand_missesCacheMemory
m_hw_prefetchesCacheMemory
m_is_instruction_only_cacheCacheMemoryprivate
m_prefetchesCacheMemory
m_replacementPolicy_ptrCacheMemoryprivate
m_resource_stallsCacheMemoryprivate
m_start_index_bitCacheMemoryprivate
m_sw_prefetchesCacheMemory
m_tag_indexCacheMemoryprivate
memInvalidate()SimObjectinlinevirtual
memWriteback()SimObjectinlinevirtual
name() const SimObjectinlinevirtual
notifyFork()Drainableinlinevirtual
numDataArrayReadsCacheMemory
numDataArrayStallsCacheMemory
numDataArrayWritesCacheMemory
numTagArrayReadsCacheMemory
numTagArrayStallsCacheMemory
numTagArrayWritesCacheMemory
operator=(const CacheMemory &obj)CacheMemoryprivate
Params typedefCacheMemory
params() const SimObjectinline
print(std::ostream &out) const CacheMemory
printData(std::ostream &out) const CacheMemory
recordCacheContents(int cntrl, CacheRecorder *tr) const CacheMemory
recordRequestType(CacheRequestType requestType, Addr addr)CacheMemory
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats()CacheMemoryvirtual
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetStats()SimObjectvirtual
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideSimObjectinlinevirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) const Serializable
serializeSection(CheckpointOut &cp, const std::string &name) const Serializableinline
setCurTick(Tick newVal)EventManagerinline
setLocked(Addr addr, int context)CacheMemory
setMRU(Addr address)CacheMemory
setMRU(Addr addr, int occupancy)CacheMemory
setMRU(const AbstractCacheEntry *e)CacheMemory
signalDrainDone() const Drainableinlineprotected
SimObject(const Params *_params)SimObject
startup()SimObjectvirtual
tagArrayCacheMemoryprivate
testCacheAccess(Addr address, RubyRequestType type, DataBlock *&data_ptr)CacheMemory
tryCacheAccess(Addr address, RubyRequestType type, DataBlock *&data_ptr)CacheMemory
unserialize(CheckpointIn &cp) overrideSimObjectinlinevirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
wakeupEventQueue(Tick when=(Tick)-1)EventManagerinline
~CacheMemory()CacheMemory
~Drainable()Drainableprotectedvirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual

Generated on Fri Jun 9 2017 13:04:04 for gem5 by doxygen 1.8.6