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LTAGE Member List

This is the complete list of members for LTAGE, including all inherited members.

_paramsSimObjectprotected
baseUpdate(Addr pc, bool taken, BranchInfo *bi)LTAGEprivate
bindex(Addr pc_in) const LTAGEprivate
BPredUnit(const Params *p)BPredUnit
btableLTAGEprivate
BTBLookup(Addr instPC)BPredUnitinline
BTBUpdate(Addr instPC, const TheISA::PCState &target)BPredUnitinline
btbUpdate(ThreadID tid, Addr branch_addr, void *&bp_history) overrideLTAGEvirtual
BTBValid(Addr instPC)BPredUnitinline
ckptCountSerializablestatic
ckptMaxCountSerializablestatic
ckptPrevCountSerializablestatic
ctrUpdate(int8_t &ctr, bool taken, int nbits)LTAGEprivate
currentSection()Serializablestatic
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainSanityCheck() const BPredUnit
drainState() const Drainableinline
dump()BPredUnit
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() const EventManagerinline
F(int phist, int size, int bank) const LTAGEprivate
find(const char *name)SimObjectstatic
getBimodePred(Addr pc, BranchInfo *bi) const LTAGEprivate
getGHR(ThreadID tid, void *bp_history) const overrideLTAGEvirtual
getLoop(Addr pc, BranchInfo *bi) const LTAGEprivate
getProbeManager()SimObject
gindex(ThreadID tid, Addr pc, int bank) const LTAGEinlineprivate
gtableLTAGEprivate
gtag(ThreadID tid, Addr pc, int bank) const LTAGEinlineprivate
histBufferSizeLTAGEprivate
histLengthsLTAGEprivate
init()SimObjectvirtual
initState()SimObjectvirtual
instShiftAmtBPredUnitprotected
lindex(Addr pc_in) const LTAGEprivate
loadState(CheckpointIn &cp)SimObjectvirtual
logSizeBiMPLTAGEprivate
logSizeLoopPredLTAGEprivate
logSizeTagTablesLTAGEprivate
logTickLTAGEprivate
lookup(ThreadID tid, Addr branch_addr, void *&bp_history) overrideLTAGEvirtual
loopUpdate(Addr pc, bool Taken, BranchInfo *bi)LTAGEprivate
loopUseCounterLTAGEprivate
ltableLTAGEprivate
LTAGE(const LTAGEParams *params)LTAGE
maxHistLTAGEprivate
memInvalidate()SimObjectinlinevirtual
memWriteback()SimObjectinlinevirtual
minHistLTAGEprivate
minTagWidthLTAGEprivate
name() const SimObjectinlinevirtual
nHistoryTablesLTAGEprivate
notifyFork()Drainableinlinevirtual
params() const SimObjectinline
Params typedefBPredUnit
pmuProbePoint(const char *name)BPredUnitprotected
ppBranchesBPredUnitprotected
ppMissesBPredUnitprotected
predict(ThreadID tid, Addr branch_pc, bool cond_branch, void *&b)LTAGEprivate
BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum, TheISA::PCState &pc, ThreadID tid)BPredUnit
regProbeListeners()SimObjectvirtual
regProbePoints() overrideBPredUnitvirtual
regStats() overrideBPredUnitvirtual
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetStats()SimObjectvirtual
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideSimObjectinlinevirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) const Serializable
serializeSection(CheckpointOut &cp, const std::string &name) const Serializableinline
setCurTick(Tick newVal)EventManagerinline
signalDrainDone() const Drainableinlineprotected
SimObject(const Params *_params)SimObject
specLoopUpdate(Addr pc, bool taken, BranchInfo *bi)LTAGEprivate
squash(ThreadID tid, void *bp_history) overrideLTAGEvirtual
squash(ThreadID tid, bool taken, void *bp_history)LTAGEprivate
BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid)BPredUnit
BPredUnit::squash(const InstSeqNum &squashed_sn, const TheISA::PCState &corr_target, bool actually_taken, ThreadID tid)BPredUnit
startup()SimObjectvirtual
tableIndicesLTAGEprivate
tableTagsLTAGEprivate
tagTableCounterBitsLTAGEprivate
tagTableSizesLTAGEprivate
tagWidthsLTAGEprivate
tCounterLTAGEprivate
threadHistoryLTAGEprivate
uncondBranch(ThreadID tid, Addr br_pc, void *&bp_history) overrideLTAGEvirtual
unserialize(CheckpointIn &cp) overrideSimObjectinlinevirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, bool squashed) overrideLTAGEvirtual
update(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *bi)LTAGEprivate
BPredUnit::update(const InstSeqNum &done_sn, ThreadID tid)BPredUnit
updateGHist(uint8_t *&h, bool dir, uint8_t *tab, int &PT)LTAGEprivate
updateHistories(ThreadID tid, Addr branch_pc, bool taken, void *b)LTAGEprivate
useAltPredForNewlyAllocatedLTAGEprivate
wakeupEventQueue(Tick when=(Tick)-1)EventManagerinline
~Drainable()Drainableprotectedvirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual

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