gem5
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This is the complete list of members for VGic, including all inherited members.
_currPwrState | ClockedObject | protected |
_params | SimObject | protected |
AckCtl | VGic | private |
BitUnion32(ListReg) Bitfield< 31 > HW | VGic | private |
ckptCount | Serializable | static |
ckptMaxCount | Serializable | static |
ckptPrevCount | Serializable | static |
Clocked(ClockDomain &clk_domain) | Clocked | inlineprotected |
Clocked(Clocked &)=delete | Clocked | protected |
clockEdge(Cycles cycles=Cycles(0)) const | Clocked | inline |
ClockedObject(const ClockedObjectParams *p) | ClockedObject | |
clockPeriod() const | Clocked | inline |
computeStats() | ClockedObject | |
CPBR | VGic | private |
CpuID | VGic | private |
curCycle() const | Clocked | inline |
currentSection() | Serializable | static |
cyclesToTicks(Cycles c) const | Clocked | inline |
deschedule(Event &event) | EventManager | inline |
deschedule(Event *event) | EventManager | inline |
drain() override | SimObject | inlinevirtual |
Drainable() | Drainable | protected |
drainResume() | Drainable | inlineprotectedvirtual |
drainState() const | Drainable | inline |
eisr | VGic | private |
En | VGic | private |
EndBitUnion(ListReg) BitUnion32(HCR) Bitfield< 31 | VGic | private |
EndBitUnion(HCR) BitUnion32(VCTLR) Bitfield< 9 > EOImode | VGic | private |
EndBitUnion(VCTLR) struct vcpuIntData | VGic | inlineprivate |
EnGrp1 | VGic | private |
EOI | VGic | private |
EOICount | VGic | private |
EventManager(EventManager &em) | EventManager | inline |
EventManager(EventManager *em) | EventManager | inline |
EventManager(EventQueue *eq) | EventManager | inline |
eventq | EventManager | protected |
eventQueue() const | EventManager | inline |
find(const char *name) | SimObject | static |
findHighestPendingLR(struct vcpuIntData *vid) | VGic | inlineprivate |
findLRForVIRQ(struct vcpuIntData *vid, int virq, int vcpu) | VGic | inlineprivate |
FIQEn | VGic | private |
frequency() const | Clocked | inline |
getAddrRanges() const override | VGic | virtual |
getMasterPort(const std::string &if_name, PortID idx=InvalidPortID) | MemObject | virtual |
getMISR(struct vcpuIntData *vid) | VGic | private |
getProbeManager() | SimObject | |
getSlavePort(const std::string &if_name, PortID idx=InvalidPortID) | PioDevice | virtual |
gic | VGic | private |
GICH_APR0 | VGic | privatestatic |
GICH_EISR0 | VGic | privatestatic |
GICH_EISR1 | VGic | privatestatic |
GICH_ELSR0 | VGic | privatestatic |
GICH_ELSR1 | VGic | privatestatic |
GICH_HCR | VGic | privatestatic |
GICH_LR0 | VGic | privatestatic |
GICH_LR1 | VGic | privatestatic |
GICH_LR2 | VGic | privatestatic |
GICH_LR3 | VGic | privatestatic |
GICH_MISR | VGic | privatestatic |
GICH_REG_SIZE | VGic | privatestatic |
GICH_SIZE | VGic | privatestatic |
GICH_VMCR | VGic | privatestatic |
GICH_VTR | VGic | privatestatic |
GICV_ABPR | VGic | privatestatic |
GICV_AEOIR | VGic | privatestatic |
GICV_AHPPIR | VGic | privatestatic |
GICV_AIAR | VGic | privatestatic |
GICV_APR0 | VGic | privatestatic |
GICV_BPR | VGic | privatestatic |
GICV_CTLR | VGic | privatestatic |
GICV_DIR | VGic | privatestatic |
GICV_EOIR | VGic | privatestatic |
GICV_HPPIR | VGic | privatestatic |
GICV_IAR | VGic | privatestatic |
GICV_IIDR | VGic | privatestatic |
GICV_PMR | VGic | privatestatic |
GICV_RPR | VGic | privatestatic |
GICV_SIZE | VGic | privatestatic |
Grp1 | VGic | private |
hcr | VGic | private |
hvAddr | VGic | private |
init() | PioDevice | virtual |
initState() | SimObject | virtual |
loadState(CheckpointIn &cp) | SimObject | virtual |
LR | VGic | private |
LR_ACTIVE | VGic | privatestatic |
LR_PENDING | VGic | privatestatic |
LRENPIE | VGic | private |
lrPending(struct vcpuIntData *vid) | VGic | inlineprivate |
lrValid(struct vcpuIntData *vid) | VGic | inlineprivate |
maintInt | VGic | private |
maintIntPosted | VGic | private |
memInvalidate() | SimObject | inlinevirtual |
MemObject(const Params *params) | MemObject | |
memWriteback() | SimObject | inlinevirtual |
name() const | SimObject | inlinevirtual |
nextCycle() const | Clocked | inline |
notifyFork() | Drainable | inlinevirtual |
NPIE | VGic | private |
NUM_LR | VGic | privatestatic |
numPwrStateTransitions | ClockedObject | protected |
operator=(Clocked &)=delete | Clocked | protected |
params() const | VGic | inline |
Params typedef | VGic | |
pioDelay | VGic | private |
PioDevice(const Params *p) | PioDevice | |
pioPort | PioDevice | protected |
platform | VGic | private |
postMaintInt(uint32_t cpu) | VGic | private |
postVInt(uint32_t cpu, Tick when) | VGic | private |
postVIntEvent | VGic | private |
Priority | VGic | private |
prvEvalTick | ClockedObject | protected |
pwrState() const | ClockedObject | inline |
pwrState(Enums::PwrState) | ClockedObject | |
pwrStateClkGateDist | ClockedObject | protected |
pwrStateName() const | ClockedObject | inline |
pwrStateResidencyTicks | ClockedObject | protected |
pwrStateWeights() const | ClockedObject | |
read(PacketPtr pkt) override | VGic | virtual |
readCtrl(PacketPtr pkt) | VGic | private |
readVCpu(PacketPtr pkt) | VGic | private |
regProbeListeners() | SimObject | virtual |
regProbePoints() | SimObject | virtual |
regStats() override | ClockedObject | virtual |
reschedule(Event &event, Tick when, bool always=false) | EventManager | inline |
reschedule(Event *event, Tick when, bool always=false) | EventManager | inline |
resetClock() const | Clocked | inlineprotected |
resetStats() | SimObject | virtual |
schedule(Event &event, Tick when) | EventManager | inline |
schedule(Event *event, Tick when) | EventManager | inline |
Serializable() | Serializable | |
serialize(CheckpointOut &cp) const override | VGic | privatevirtual |
serialize(CheckpointOut &cp) const override | VGic | virtual |
serializeAll(CheckpointOut &cp) | SimObject | static |
Serializable::serializeAll(const std::string &cpt_dir) | Serializable | static |
serializeSection(CheckpointOut &cp, const char *name) const | Serializable | |
serializeSection(CheckpointOut &cp, const std::string &name) const | Serializable | inline |
setCurTick(Tick newVal) | EventManager | inline |
signalDrainDone() const | Drainable | inlineprotected |
SimObject(const Params *_params) | SimObject | |
startup() | SimObject | virtual |
State | VGic | private |
sys | PioDevice | protected |
ticksToCycles(Tick t) const | Clocked | inline |
UIE | VGic | private |
unPostMaintInt(uint32_t cpu) | VGic | private |
unPostVInt(uint32_t cpu) | VGic | private |
unserialize(CheckpointIn &cp) override | VGic | privatevirtual |
unserialize(CheckpointIn &cp) override | VGic | virtual |
unserializeGlobals(CheckpointIn &cp) | Serializable | static |
unserializeSection(CheckpointIn &cp, const char *name) | Serializable | |
unserializeSection(CheckpointIn &cp, const std::string &name) | Serializable | inline |
updateClockPeriod() const | Clocked | inline |
updateIntState(ContextID ctx_id) | VGic | private |
vcpuAddr | VGic | private |
vcpuData | VGic | private |
vctrl | VGic | private |
VEM | VGic | private |
VGic(const Params *p) | VGic | |
VGIC_CPU_MAX | VGic | privatestatic |
VGrp0DIE | VGic | private |
VGrp0EIE | VGic | private |
VGrp1DIE | VGic | private |
VGrp1EIE | VGic | private |
vIntPosted | VGic | private |
VirtualID | VGic | private |
VMABP | VGic | private |
VMAckCtl | VGic | private |
VMBP | VGic | private |
VMCBPR | VGic | private |
VMFiqEn | VGic | private |
VMGrp0En | VGic | private |
VMGrp1En | VGic | private |
VMPriMask | VGic | private |
voltage() const | Clocked | inline |
wakeupEventQueue(Tick when=(Tick)-1) | EventManager | inline |
write(PacketPtr pkt) override | VGic | virtual |
writeCtrl(PacketPtr pkt) | VGic | private |
writeVCpu(PacketPtr pkt) | VGic | private |
~Clocked() | Clocked | inlineprotectedvirtual |
~Drainable() | Drainable | protectedvirtual |
~PioDevice() | PioDevice | virtual |
~Serializable() | Serializable | virtual |
~SimObject() | SimObject | virtual |
~vcpuIntData() | VGic | inlineprivatevirtual |