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gpu-compute
gpu_exec_context.hh
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/*
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* Copyright (c) 2015 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* For use for simulation and test purposes only
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: Anthony Gutierrez
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*/
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#ifndef __GPU_EXEC_CONTEXT_HH__
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#define __GPU_EXEC_CONTEXT_HH__
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#include "arch/gpu_isa.hh"
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#include "config/the_gpu_isa.hh"
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class
ComputeUnit
;
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class
Wavefront
;
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class
GPUExecContext
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{
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public
:
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GPUExecContext
(
ComputeUnit
*_cu,
Wavefront
*_wf);
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Wavefront
*
wavefront
();
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ComputeUnit
*
computeUnit
();
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TheGpuISA::MiscReg
readMiscReg
(
int
opIdx)
const
;
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void
writeMiscReg
(
int
opIdx,
TheGpuISA::MiscReg
operandVal);
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protected
:
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ComputeUnit
*
cu
;
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Wavefront
*
wf
;
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TheGpuISA::GPUISA *
gpuISA
;
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};
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#endif // __GPU_EXEC_CONTEXT_HH__
Wavefront
Definition:
wavefront.hh:147
GPUExecContext::readMiscReg
TheGpuISA::MiscReg readMiscReg(int opIdx) const
Definition:
gpu_exec_context.cc:57
GPUExecContext
Definition:
gpu_exec_context.hh:45
AlphaISA::MiscReg
uint64_t MiscReg
Definition:
registers.hh:54
GPUExecContext::wavefront
Wavefront * wavefront()
Definition:
gpu_exec_context.cc:51
GPUExecContext::GPUExecContext
GPUExecContext(ComputeUnit *_cu, Wavefront *_wf)
Definition:
gpu_exec_context.cc:39
GPUExecContext::gpuISA
TheGpuISA::GPUISA * gpuISA
Definition:
gpu_exec_context.hh:58
GPUExecContext::cu
ComputeUnit * cu
Definition:
gpu_exec_context.hh:56
ComputeUnit
Definition:
compute_unit.hh:93
GPUExecContext::writeMiscReg
void writeMiscReg(int opIdx, TheGpuISA::MiscReg operandVal)
Definition:
gpu_exec_context.cc:64
GPUExecContext::wf
Wavefront * wf
Definition:
gpu_exec_context.hh:57
GPUExecContext::computeUnit
ComputeUnit * computeUnit()
Definition:
gpu_exec_context.cc:45
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