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ide_atareg.h
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1 /* $OpenBSD: atareg.h,v 1.12 2004/09/24 07:15:22 grange Exp $ */
2 /* $NetBSD: atareg.h,v 1.5 1999/01/18 20:06:24 bouyer Exp $ */
3 
4 /*
5  * Copyright (c) 1998, 2001 Manuel Bouyer.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  * notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  * must display the following acknowledgement:
17  * This product includes software developed by Manuel Bouyer.
18  * 4. The name of the author may not be used to endorse or promote products
19  * derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _DEV_ATA_ATAREG_H_
34 #define _DEV_ATA_ATAREG_H_
35 
36 #if defined(__linux__)
37 #include <endian.h>
38 
39 #elif defined(__sun)
40 #include <sys/isa_defs.h>
41 
42 #else
43 #include <machine/endian.h>
44 
45 #endif
46 
47 #ifdef LITTLE_ENDIAN
48 #define ATA_BYTE_ORDER LITTLE_ENDIAN
49 #elif defined(BIG_ENDIAN)
50 #define ATA_BYTE_ORDER BIG_ENDIAN
51 #elif defined(_LITTLE_ENDIAN)
52 #define ATA_BYTE_ORDER 1
53 #define LITTLE_ENDIAN 1
54 #elif defined(_BIG_ENDIAN)
55 #define ATA_BYTE_ORDER 0
56 #define LITTLE_ENDIAN 1
57 #else
58 #error "No endianess defined"
59 #endif
60 
61 /*
62  * Drive parameter structure for ATA/ATAPI.
63  * Bit fields: WDC_* : common to ATA/ATAPI
64  * ATA_* : ATA only
65  * ATAPI_* : ATAPI only.
66  */
67 struct ataparams {
68  /* drive info */
69  uint16_t atap_config; /* 0: general configuration */
70 #define WDC_CFG_ATAPI_MASK 0xc000
71 #define WDC_CFG_ATAPI 0x8000
72 #define ATA_CFG_REMOVABLE 0x0080
73 #define ATA_CFG_FIXED 0x0040
74 #define ATAPI_CFG_TYPE_MASK 0x1f00
75 #define ATAPI_CFG_TYPE(x) (((x) & ATAPI_CFG_TYPE_MASK) >> 8)
76 #define ATAPI_CFG_TYPE_DIRECT 0x00
77 #define ATAPI_CFG_TYPE_SEQUENTIAL 0x01
78 #define ATAPI_CFG_TYPE_CDROM 0x05
79 #define ATAPI_CFG_TYPE_OPTICAL 0x07
80 #define ATAPI_CFG_TYPE_NODEVICE 0x1F
81 #define ATAPI_CFG_REMOV 0x0080
82 #define ATAPI_CFG_DRQ_MASK 0x0060
83 #define ATAPI_CFG_STD_DRQ 0x0000
84 #define ATAPI_CFG_IRQ_DRQ 0x0020
85 #define ATAPI_CFG_ACCEL_DRQ 0x0040
86 #define ATAPI_CFG_CMD_MASK 0x0003
87 #define ATAPI_CFG_CMD_12 0x0000
88 #define ATAPI_CFG_CMD_16 0x0001
89 /* words 1-9 are ATA only */
90  uint16_t atap_cylinders; /* 1: # of non-removable cylinders */
91  uint16_t __reserved1;
92  uint16_t atap_heads; /* 3: # of heads */
93  uint16_t __retired1[2]; /* 4-5: # of unform. bytes/track */
94  uint16_t atap_sectors; /* 6: # of sectors */
95  uint16_t __retired2[3];
96 
97  uint8_t atap_serial[20]; /* 10-19: serial number */
98  uint16_t __retired3[2];
99  uint16_t __obsolete1;
100  uint8_t atap_revision[8]; /* 23-26: firmware revision */
101  uint8_t atap_model[40]; /* 27-46: model number */
102  uint16_t atap_multi; /* 47: maximum sectors per irq (ATA) */
103  uint16_t __reserved2;
104  uint8_t atap_vendor; /* 49: vendor */
105  uint8_t atap_capabilities1; /* 49: capability flags */
106 #define WDC_CAP_IORDY 0x0800
107 #define WDC_CAP_IORDY_DSBL 0x0400
108 #define WDC_CAP_LBA 0x0200
109 #define WDC_CAP_DMA 0x0100
110 #define ATA_CAP_STBY 0x2000
111 #define ATAPI_CAP_INTERL_DMA 0x8000
112 #define ATAPI_CAP_CMD_QUEUE 0x4000
113 #define ATAPI_CAP_OVERLP 0x2000
114 #define ATAPI_CAP_ATA_RST 0x1000
115  uint16_t atap_capabilities2; /* 50: capability flags (ATA) */
116 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
117  uint8_t __junk2;
118  uint8_t atap_oldpiotiming; /* 51: old PIO timing mode */
119  uint8_t __junk3;
120  uint8_t atap_olddmatiming; /* 52: old DMA timing mode (ATA) */
121 #else
122  uint8_t atap_oldpiotiming; /* 51: old PIO timing mode */
123  uint8_t __junk2;
124  uint8_t atap_olddmatiming; /* 52: old DMA timing mode (ATA) */
125  uint8_t __junk3;
126 #endif
127  uint16_t atap_extensions; /* 53: extensions supported */
128 #define WDC_EXT_UDMA_MODES 0x0004
129 #define WDC_EXT_MODES 0x0002
130 #define WDC_EXT_GEOM 0x0001
131 /* words 54-62 are ATA only */
132  uint16_t atap_curcylinders; /* 54: current logical cylinders */
133  uint16_t atap_curheads; /* 55: current logical heads */
134  uint16_t atap_cursectors; /* 56: current logical sectors/tracks */
135  uint16_t atap_curcapacity[2]; /* 57-58: current capacity */
136  uint8_t atap_curmulti; /* 59: current multi-sector setting */
137  uint8_t atap_curmulti_valid; /* 59: current multi-sector setting */
138 #define WDC_MULTI_VALID 0x0100
139 #define WDC_MULTI_MASK 0x00ff
140  uint32_t atap_capacity; /* 60-61: total capacity (LBA only) */
141  uint16_t __retired4;
142 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
143  uint8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */
144  uint8_t atap_dmamode_act; /* multiword DMA mode active */
145  uint8_t atap_piomode_supp; /* 64: PIO mode supported */
146  uint8_t __junk4;
147 #else
148  uint8_t atap_dmamode_act; /* multiword DMA mode active */
149  uint8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */
150  uint8_t __junk4;
151  uint8_t atap_piomode_supp; /* 64: PIO mode supported */
152 #endif
153  uint16_t atap_dmatiming_mimi; /* 65: minimum DMA cycle time */
154  uint16_t atap_dmatiming_recom; /* 66: recommended DMA cycle time */
155  uint16_t atap_piotiming; /* 67: mini PIO cycle time without FC */
156  uint16_t atap_piotiming_iordy; /* 68: mini PIO cycle time with IORDY FC */
157  uint16_t __reserved3[2];
158 /* words 71-72 are ATAPI only */
159  uint16_t atap_pkt_br; /* 71: time (ns) to bus release */
160  uint16_t atap_pkt_bsyclr; /* 72: tme to clear BSY after service */
161  uint16_t __reserved4[2];
162  uint16_t atap_queuedepth; /* 75: */
163 #define WDC_QUEUE_DEPTH_MASK 0x1f
164  uint16_t atap_sata_caps; /* 76: SATA capabilities */
165 #define SATA_SIGNAL_GEN1 0x0002 /* SATA Gen-1 signaling speed */
166 #define SATA_SIGNAL_GEN2 0x0004 /* SATA Gen-2 signaling speed */
167 #define SATA_NATIVE_CMDQ 0x0100 /* native command queuing */
168 #define SATA_HOST_PWR_MGMT 0x0200 /* power management (host) */
169  uint16_t atap_sata_reserved; /* 77: reserved */
170  uint16_t atap_sata_features_supp;/* 78: SATA features supported */
171 #define SATA_NONZERO_OFFSETS 0x0002 /* non-zero buffer offsets */
172 #define SATA_DMA_SETUP_AUTO 0x0004 /* DMA setup auto-activate */
173 #define SATA_DRIVE_PWR_MGMT 0x0008 /* power management (device) */
174  uint16_t atap_sata_features_en; /* 79: SATA features enabled */
175  uint16_t atap_ata_major; /* 80: Major version number */
176 #define WDC_VER_ATA1 0x0002
177 #define WDC_VER_ATA2 0x0004
178 #define WDC_VER_ATA3 0x0008
179 #define WDC_VER_ATA4 0x0010
180 #define WDC_VER_ATA5 0x0020
181 #define WDC_VER_ATA6 0x0040
182 #define WDC_VER_ATA7 0x0080
183 #define WDC_VER_ATA8 0x0100
184 #define WDC_VER_ATA9 0x0200
185 #define WDC_VER_ATA10 0x0400
186 #define WDC_VER_ATA11 0x0800
187 #define WDC_VER_ATA12 0x1000
188 #define WDC_VER_ATA13 0x2000
189 #define WDC_VER_ATA14 0x4000
190  uint16_t atap_ata_minor; /* 81: Minor version number */
191  uint16_t atap_cmd_set1; /* 82: command set supported */
192 #define WDC_CMD1_NOP 0x4000
193 #define WDC_CMD1_RB 0x2000
194 #define WDC_CMD1_WB 0x1000
195 #define WDC_CMD1_HPA 0x0400
196 #define WDC_CMD1_DVRST 0x0200
197 #define WDC_CMD1_SRV 0x0100
198 #define WDC_CMD1_RLSE 0x0080
199 #define WDC_CMD1_AHEAD 0x0040
200 #define WDC_CMD1_CACHE 0x0020
201 #define WDC_CMD1_PKT 0x0010
202 #define WDC_CMD1_PM 0x0008
203 #define WDC_CMD1_REMOV 0x0004
204 #define WDC_CMD1_SEC 0x0002
205 #define WDC_CMD1_SMART 0x0001
206  uint16_t atap_cmd_set2; /* 83: command set supported */
207 #define ATAPI_CMD2_FCE 0x2000 /* Flush Cache Ext supported */
208 #define ATAPI_CMD2_FC 0x1000 /* Flush Cache supported */
209 #define ATAPI_CMD2_DCO 0x0800 /* Device Configuration Overlay supported */
210 #define ATAPI_CMD2_48AD 0x0400 /* 48bit address supported */
211 #define ATAPI_CMD2_AAM 0x0200 /* Automatic Acoustic Management supported */
212 #define ATAPI_CMD2_SM 0x0100 /* Set Max security extension supported */
213 #define ATAPI_CMD2_SF 0x0040 /* Set Features subcommand required */
214 #define ATAPI_CMD2_PUIS 0x0020 /* Power up in standby supported */
215 #define WDC_CMD2_RMSN 0x0010
216 #define ATA_CMD2_APM 0x0008
217 #define ATA_CMD2_CFA 0x0004
218 #define ATA_CMD2_RWQ 0x0002
219 #define WDC_CMD2_DM 0x0001 /* Download Microcode supported */
220  uint16_t atap_cmd_ext; /* 84: command/features supp. ext. */
221 #define ATAPI_CMDE_MSER 0x0004 /* Media serial number supported */
222 #define ATAPI_CMDE_TEST 0x0002 /* SMART self-test supported */
223 #define ATAPI_CMDE_SLOG 0x0001 /* SMART error logging supported */
224  uint16_t atap_cmd1_en; /* 85: cmd/features enabled */
225 /* bits are the same as atap_cmd_set1 */
226  uint16_t atap_cmd2_en; /* 86: cmd/features enabled */
227 /* bits are the same as atap_cmd_set2 */
228  uint16_t atap_cmd_def; /* 87: cmd/features default */
229 /* bits are NOT the same as atap_cmd_ext */
230 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
231  uint8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */
232  uint8_t atap_udmamode_act; /* Ultra-DMA mode active */
233 #else
234  uint8_t atap_udmamode_act; /* Ultra-DMA mode active */
235  uint8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */
236 #endif
237 /* 89-92 are ATA-only */
238  uint16_t atap_seu_time; /* 89: Sec. Erase Unit compl. time */
239  uint16_t atap_eseu_time; /* 90: Enhanced SEU compl. time */
240  uint16_t atap_apm_val; /* 91: current APM value */
241  uint16_t atap_mpasswd_rev; /* 92: Master Password revision */
242  uint16_t atap_hwreset_res; /* 93: Hardware reset value */
243 #define ATA_HWRES_CBLID 0x2000 /* CBLID above Vih */
244 #define ATA_HWRES_D1_PDIAG 0x0800 /* Device 1 PDIAG detect OK */
245 #define ATA_HWRES_D1_CSEL 0x0400 /* Device 1 used CSEL for address */
246 #define ATA_HWRES_D1_JUMP 0x0200 /* Device 1 jumpered to address */
247 #define ATA_HWRES_D0_SEL 0x0040 /* Device 0 responds when Dev 1 selected */
248 #define ATA_HWRES_D0_DASP 0x0020 /* Device 0 DASP detect OK */
249 #define ATA_HWRES_D0_PDIAG 0x0010 /* Device 0 PDIAG detect OK */
250 #define ATA_HWRES_D0_DIAG 0x0008 /* Device 0 diag OK */
251 #define ATA_HWRES_D0_CSEL 0x0004 /* Device 0 used CSEL for address */
252 #define ATA_HWRES_D0_JUMP 0x0002 /* Device 0 jumpered to address */
253 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
254  uint8_t atap_acoustic_val; /* 94: Current acoustic level */
255  uint8_t atap_acoustic_def; /* recommended level */
256 #else
257  uint8_t atap_acoustic_def; /* recommended level */
258  uint8_t atap_acoustic_val; /* 94: Current acoustic level */
259 #endif
260  uint16_t __reserved6[5]; /* 95-99: reserved */
261  uint16_t atap_max_lba[4]; /* 100-103: Max. user LBA add */
262  uint16_t __reserved7[23]; /* 104-126: reserved */
263  uint16_t atap_rmsn_supp; /* 127: remov. media status notif. */
264 #define WDC_RMSN_SUPP_MASK 0x0003
265 #define WDC_RMSN_SUPP 0x0001
266  uint16_t atap_sec_st; /* 128: security status */
267 #define WDC_SEC_LEV_MAX 0x0100
268 #define WDC_SEC_ESE_SUPP 0x0020
269 #define WDC_SEC_EXP 0x0010
270 #define WDC_SEC_FROZEN 0x0008
271 #define WDC_SEC_LOCKED 0x0004
272 #define WDC_SEC_EN 0x0002
273 #define WDC_SEC_SUPP 0x0001
274  uint16_t __reserved8[31]; /* 129-159: vendor specific */
275  uint16_t atap_cfa_power; /* 160: CFA powermode */
276 #define ATAPI_CFA_MAX_MASK 0x0FFF
277 #define ATAPI_CFA_MODE1_DIS 0x1000 /* CFA Mode 1 Disabled */
278 #define ATAPI_CFA_MODE1_REQ 0x2000 /* CFA Mode 1 Required */
279 #define ATAPI_CFA_WORD160 0x8000 /* Word 160 supported */
280  uint16_t __reserved9[15]; /* 161-175: reserved for CFA */
281  uint8_t atap_media_serial[60]; /* 176-205: media serial number */
282  uint16_t __reserved10[49]; /* 206-254: reserved */
283 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
284  uint8_t atap_signature; /* 255: Signature */
285  uint8_t atap_checksum; /* Checksum */
286 #else
287  uint8_t atap_checksum; /* Checksum */
288  uint8_t atap_signature; /* 255: Signature */
289 #endif
290 };
291 
292 #undef ATA_BYTE_ORDER
293 #endif /* !_DEV_ATA_ATAREG_H_ */
uint16_t __retired3[2]
Definition: ide_atareg.h:98
uint8_t atap_vendor
Definition: ide_atareg.h:104
uint16_t atap_seu_time
Definition: ide_atareg.h:238
uint16_t __reserved6[5]
Definition: ide_atareg.h:260
uint16_t atap_extensions
Definition: ide_atareg.h:127
uint8_t atap_serial[20]
Definition: ide_atareg.h:97
uint16_t atap_max_lba[4]
Definition: ide_atareg.h:261
uint8_t atap_revision[8]
Definition: ide_atareg.h:100
uint8_t atap_piomode_supp
Definition: ide_atareg.h:145
uint16_t atap_cmd_ext
Definition: ide_atareg.h:220
uint16_t atap_curcylinders
Definition: ide_atareg.h:132
uint16_t atap_queuedepth
Definition: ide_atareg.h:162
uint16_t atap_config
Definition: ide_atareg.h:69
uint8_t atap_capabilities1
Definition: ide_atareg.h:105
uint16_t atap_ata_minor
Definition: ide_atareg.h:190
uint16_t atap_sata_features_en
Definition: ide_atareg.h:174
uint16_t atap_cursectors
Definition: ide_atareg.h:134
uint16_t __reserved3[2]
Definition: ide_atareg.h:157
uint8_t atap_media_serial[60]
Definition: ide_atareg.h:281
uint16_t atap_sata_features_supp
Definition: ide_atareg.h:170
uint16_t atap_cmd2_en
Definition: ide_atareg.h:226
uint8_t atap_signature
Definition: ide_atareg.h:284
uint16_t atap_eseu_time
Definition: ide_atareg.h:239
uint8_t atap_acoustic_val
Definition: ide_atareg.h:254
uint16_t atap_hwreset_res
Definition: ide_atareg.h:242
uint8_t atap_curmulti
Definition: ide_atareg.h:136
uint16_t atap_cmd_def
Definition: ide_atareg.h:228
uint16_t atap_multi
Definition: ide_atareg.h:102
uint16_t atap_pkt_bsyclr
Definition: ide_atareg.h:160
uint8_t __junk3
Definition: ide_atareg.h:119
uint8_t atap_model[40]
Definition: ide_atareg.h:101
uint16_t atap_apm_val
Definition: ide_atareg.h:240
uint8_t atap_olddmatiming
Definition: ide_atareg.h:120
uint8_t atap_curmulti_valid
Definition: ide_atareg.h:137
uint16_t atap_curheads
Definition: ide_atareg.h:133
uint16_t __obsolete1
Definition: ide_atareg.h:99
uint16_t atap_sectors
Definition: ide_atareg.h:94
uint8_t atap_udmamode_supp
Definition: ide_atareg.h:231
uint16_t atap_dmatiming_recom
Definition: ide_atareg.h:154
uint8_t atap_acoustic_def
Definition: ide_atareg.h:255
uint8_t __junk2
Definition: ide_atareg.h:117
uint16_t atap_piotiming
Definition: ide_atareg.h:155
uint16_t atap_ata_major
Definition: ide_atareg.h:175
uint16_t atap_pkt_br
Definition: ide_atareg.h:159
uint16_t __reserved10[49]
Definition: ide_atareg.h:282
uint8_t atap_udmamode_act
Definition: ide_atareg.h:232
uint16_t atap_cylinders
Definition: ide_atareg.h:90
uint8_t atap_dmamode_act
Definition: ide_atareg.h:144
uint16_t atap_cmd_set2
Definition: ide_atareg.h:206
uint16_t atap_curcapacity[2]
Definition: ide_atareg.h:135
uint8_t __junk4
Definition: ide_atareg.h:146
uint8_t atap_checksum
Definition: ide_atareg.h:285
uint16_t atap_capabilities2
Definition: ide_atareg.h:115
uint16_t atap_rmsn_supp
Definition: ide_atareg.h:263
uint16_t atap_dmatiming_mimi
Definition: ide_atareg.h:153
uint16_t atap_mpasswd_rev
Definition: ide_atareg.h:241
uint16_t __reserved2
Definition: ide_atareg.h:103
uint16_t __reserved7[23]
Definition: ide_atareg.h:262
uint16_t __reserved9[15]
Definition: ide_atareg.h:280
uint16_t __retired2[3]
Definition: ide_atareg.h:95
uint16_t __retired4
Definition: ide_atareg.h:141
uint16_t __reserved8[31]
Definition: ide_atareg.h:274
uint16_t atap_cmd_set1
Definition: ide_atareg.h:191
uint16_t __reserved4[2]
Definition: ide_atareg.h:161
uint16_t atap_cmd1_en
Definition: ide_atareg.h:224
uint16_t atap_cfa_power
Definition: ide_atareg.h:275
uint16_t __reserved1
Definition: ide_atareg.h:91
uint16_t atap_sata_caps
Definition: ide_atareg.h:164
uint32_t atap_capacity
Definition: ide_atareg.h:140
uint8_t atap_dmamode_supp
Definition: ide_atareg.h:143
uint16_t __retired1[2]
Definition: ide_atareg.h:93
uint16_t atap_piotiming_iordy
Definition: ide_atareg.h:156
uint16_t atap_sec_st
Definition: ide_atareg.h:266
uint16_t atap_sata_reserved
Definition: ide_atareg.h:169
uint16_t atap_heads
Definition: ide_atareg.h:92
uint8_t atap_oldpiotiming
Definition: ide_atareg.h:118

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