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gem5
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#include "arch/x86/insts/microop.hh"#include "arch/x86/ldstflags.hh"#include "mem/packet.hh"#include "mem/request.hh"#include "sim/faults.hh"Go to the source code of this file.
Classes | |
| class | X86ISA::MemOp |
| Base class for memory ops. More... | |
| class | X86ISA::LdStOp |
| Base class for load and store ops using one register. More... | |
| class | X86ISA::LdStSplitOp |
| Base class for load and store ops using two registers, we will call them split ops for this reason. More... | |
Namespaces | |
| X86ISA | |
| This is exposed globally, independent of the ISA. | |