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X86ISA::LdStSplitOp Class Reference

Base class for load and store ops using two registers, we will call them split ops for this reason. More...

#include <microldstop.hh>

Inheritance diagram for X86ISA::LdStSplitOp:
X86ISA::MemOp X86ISA::X86MicroopBase X86ISA::X86StaticInst StaticInst RefCounted

Protected Member Functions

 LdStSplitOp (ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, uint8_t _scale, InstRegIndex _index, InstRegIndex _base, uint64_t _disp, InstRegIndex _segment, InstRegIndex _dataLow, InstRegIndex _dataHi, uint8_t _dataSize, uint8_t _addressSize, Request::FlagsType _memFlags, OpClass __opClass)
 
std::string generateDisassembly (Addr pc, const SymbolTable *symtab) const
 Internal function to generate disassembly string. More...
 
- Protected Member Functions inherited from X86ISA::MemOp
 MemOp (ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, uint8_t _scale, InstRegIndex _index, InstRegIndex _base, uint64_t _disp, InstRegIndex _segment, uint8_t _dataSize, uint8_t _addressSize, Request::FlagsType _memFlags, OpClass __opClass)
 
- Protected Member Functions inherited from X86ISA::X86MicroopBase
 X86MicroopBase (ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, OpClass __opClass)
 
std::string generateDisassembly (Addr pc, const SymbolTable *symtab) const
 Internal function to generate disassembly string. More...
 
bool checkCondition (uint64_t flags, int condition) const
 
void advancePC (PCState &pcState) const
 
- Protected Member Functions inherited from X86ISA::X86StaticInst
 X86StaticInst (const char *mnem, ExtMachInst _machInst, OpClass __opClass)
 
std::string generateDisassembly (Addr pc, const SymbolTable *symtab) const
 Internal function to generate disassembly string. More...
 
void printMnemonic (std::ostream &os, const char *mnemonic) const
 
void printMnemonic (std::ostream &os, const char *instMnemonic, const char *mnemonic) const
 
void printSegment (std::ostream &os, int segment) const
 
void printReg (std::ostream &os, int reg, int size) const
 
void printSrcReg (std::ostream &os, int reg, int size) const
 
void printDestReg (std::ostream &os, int reg, int size) const
 
void printMem (std::ostream &os, uint8_t segment, uint8_t scale, RegIndex index, RegIndex base, uint64_t disp, uint8_t addressSize, bool rip) const
 
uint64_t merge (uint64_t into, uint64_t val, int size) const
 
uint64_t pick (uint64_t from, int idx, int size) const
 
int64_t signedPick (uint64_t from, int idx, int size) const
 
void advancePC (PCState &pcState) const
 
- Protected Member Functions inherited from StaticInst
 StaticInst (const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)
 Constructor. More...
 

Protected Attributes

const RegIndex dataLow
 
const RegIndex dataHi
 
- Protected Attributes inherited from X86ISA::MemOp
const uint8_t scale
 
const RegIndex index
 
const RegIndex base
 
const uint64_t disp
 
const uint8_t segment
 
const uint8_t dataSize
 
const uint8_t addressSize
 
const Request::FlagsType memFlags
 
RegIndex foldOBit
 
RegIndex foldABit
 
- Protected Attributes inherited from X86ISA::X86MicroopBase
const char * instMnem
 
uint8_t opSize
 
uint8_t addrSize
 
- Protected Attributes inherited from StaticInst
std::bitset< Num_Flags > flags
 Flag values for this instruction. More...
 
OpClass _opClass
 See opClass(). More...
 
int8_t _numSrcRegs
 See numSrcRegs(). More...
 
int8_t _numDestRegs
 See numDestRegs(). More...
 
RegIndex _destRegIdx [MaxInstDestRegs]
 See destRegIdx(). More...
 
RegIndex _srcRegIdx [MaxInstSrcRegs]
 See srcRegIdx(). More...
 
const char * mnemonic
 Base mnemonic (e.g., "add"). More...
 
std::string * cachedDisassembly
 String representation of disassembly (lazily evaluated via disassemble()). More...
 
int8_t _numFPDestRegs
 The following are used to track physical register usage for machines with separate int & FP reg files. More...
 
int8_t _numIntDestRegs
 
int8_t _numCCDestRegs
 

Additional Inherited Members

- Public Types inherited from StaticInst
enum  { MaxInstSrcRegs = TheISA::MaxInstSrcRegs, MaxInstDestRegs = TheISA::MaxInstDestRegs }
 
typedef TheISA::ExtMachInst ExtMachInst
 Binary extended machine instruction type. More...
 
typedef TheISA::RegIndex RegIndex
 Logical register index type. More...
 
- Public Member Functions inherited from StaticInst
int8_t numCCDestRegs () const
 Number of coprocesor destination regs. More...
 
void setFirstMicroop ()
 
void setLastMicroop ()
 
void setDelayedCommit ()
 
void setFlag (Flags f)
 
OpClass opClass () const
 Operation class. Used to select appropriate function unit in issue. More...
 
RegIndex destRegIdx (int i) const
 Return logical index (architectural reg num) of i'th destination reg. More...
 
RegIndex srcRegIdx (int i) const
 Return logical index (architectural reg num) of i'th source reg. More...
 
virtual const StaticInstPtreaCompInst () const
 Memory references only: returns "fake" instruction representing the effective address part of the memory operation. More...
 
virtual const StaticInstPtrmemAccInst () const
 Memory references only: returns "fake" instruction representing the memory access part of the memory operation. More...
 
virtual ~StaticInst ()
 
virtual Fault execute (ExecContext *xc, Trace::InstRecord *traceData) const =0
 
virtual Fault eaComp (ExecContext *xc, Trace::InstRecord *traceData) const
 
virtual Fault initiateAcc (ExecContext *xc, Trace::InstRecord *traceData) const
 
virtual Fault completeAcc (Packet *pkt, ExecContext *xc, Trace::InstRecord *traceData) const
 
virtual void advancePC (TheISA::PCState &pcState) const =0
 
virtual StaticInstPtr fetchMicroop (MicroPC upc) const
 Return the microop that goes with a particular micropc. More...
 
virtual TheISA::PCState branchTarget (const TheISA::PCState &pc) const
 Return the target address for a PC-relative branch. More...
 
virtual TheISA::PCState branchTarget (ThreadContext *tc) const
 Return the target address for an indirect branch (jump). More...
 
bool hasBranchTarget (const TheISA::PCState &pc, ThreadContext *tc, TheISA::PCState &tgt) const
 Return true if the instruction is a control transfer, and if so, return the target address as well. More...
 
virtual const std::string & disassemble (Addr pc, const SymbolTable *symtab=0) const
 Return string representation of disassembled instruction. More...
 
void printFlags (std::ostream &outs, const std::string &separator) const
 Print a separator separated list of this instruction's set flag names on the given stream. More...
 
std::string getName ()
 Return name of machine instruction. More...
 
int8_t numSrcRegs () const
 Number of source registers. More...
 
int8_t numDestRegs () const
 Number of destination registers. More...
 
int8_t numFPDestRegs () const
 Number of floating-point destination regs. More...
 
int8_t numIntDestRegs () const
 Number of integer destination regs. More...
 
bool isNop () const
 
bool isMemRef () const
 
bool isLoad () const
 
bool isStore () const
 
bool isStoreConditional () const
 
bool isInstPrefetch () const
 
bool isDataPrefetch () const
 
bool isPrefetch () const
 
bool isInteger () const
 
bool isFloating () const
 
bool isCC () const
 
bool isControl () const
 
bool isCall () const
 
bool isReturn () const
 
bool isDirectCtrl () const
 
bool isIndirectCtrl () const
 
bool isCondCtrl () const
 
bool isUncondCtrl () const
 
bool isCondDelaySlot () const
 
bool isThreadSync () const
 
bool isSerializing () const
 
bool isSerializeBefore () const
 
bool isSerializeAfter () const
 
bool isSquashAfter () const
 
bool isMemBarrier () const
 
bool isWriteBarrier () const
 
bool isNonSpeculative () const
 
bool isQuiesce () const
 
bool isIprAccess () const
 
bool isUnverifiable () const
 
bool isSyscall () const
 
bool isMacroop () const
 
bool isMicroop () const
 
bool isDelayedCommit () const
 
bool isLastMicroop () const
 
bool isFirstMicroop () const
 
bool isMicroBranch () const
 
- Public Member Functions inherited from RefCounted
 RefCounted ()
 We initialize the reference count to zero and the first object to take ownership of it must increment it to one. More...
 
virtual ~RefCounted ()
 We make the destructor virtual because we're likely to have virtual functions on reference counted objects. More...
 
void incref ()
 Increment the reference count. More...
 
void decref ()
 Decrement the reference count and destroy the object if all references are gone. More...
 
- Public Attributes inherited from StaticInst
const ExtMachInst machInst
 The binary machine instruction. More...
 
- Static Public Attributes inherited from StaticInst
static StaticInstPtr nullStaticInstPtr
 Pointer to a statically allocated "null" instruction object. More...
 

Detailed Description

Base class for load and store ops using two registers, we will call them split ops for this reason.

These are mainly used to implement cmpxchg8b and cmpxchg16b.

Definition at line 126 of file microldstop.hh.

Constructor & Destructor Documentation

X86ISA::LdStSplitOp::LdStSplitOp ( ExtMachInst  _machInst,
const char *  mnem,
const char *  _instMnem,
uint64_t  setFlags,
uint8_t  _scale,
InstRegIndex  _index,
InstRegIndex  _base,
uint64_t  _disp,
InstRegIndex  _segment,
InstRegIndex  _dataLow,
InstRegIndex  _dataHi,
uint8_t  _dataSize,
uint8_t  _addressSize,
Request::FlagsType  _memFlags,
OpClass  __opClass 
)
inlineprotected

Definition at line 133 of file microldstop.hh.

Member Function Documentation

std::string X86ISA::LdStSplitOp::generateDisassembly ( Addr  pc,
const SymbolTable symtab 
) const
protectedvirtual

Member Data Documentation

const RegIndex X86ISA::LdStSplitOp::dataHi
protected

Definition at line 130 of file microldstop.hh.

const RegIndex X86ISA::LdStSplitOp::dataLow
protected

Definition at line 129 of file microldstop.hh.


The documentation for this class was generated from the following files:

Generated on Fri Jun 9 2017 13:04:42 for gem5 by doxygen 1.8.6