47 #ifndef __CPU_MINOR_DECODE_HH__
48 #define __CPU_MINOR_DECODE_HH__
143 MinorCPUParams ¶ms,
Data members after this line are cycle-to-cycle state.
bool blocked
Blocked indication for report.
const std::string & name() const
Decode(const std::string &name, MinorCPU &cpu_, MinorCPUParams ¶ms, Latch< ForwardInstData >::Output inp_, Latch< ForwardInstData >::Input out_, std::vector< InputBuffer< ForwardInstData >> &next_stage_input_buffer)
Top level definition of the Minor in-order CPU model.
std::vector< InputBuffer< ForwardInstData > > & nextStageReserve
Interface to reserve space in the next stage.
Latch< ForwardInstData >::Input out
Output port carrying micro-op decomposed instructions to Execute.
Contains class definitions for data flowing between pipeline stages in the top-level structure portio...
unsigned int inputIndex
Index into the inputBuffer's head marking the start of unhandled instructions.
Id for lines and instructions.
TheISA::PCState microopPC
std::vector< InputBuffer< ForwardInstData > > inputBuffer
MinorCPU & cpu
Pointer back to the containing CPU.
bool isDrained()
Is this stage drained? For Decoed, draining is initiated by Execute halting Fetch1 causing Fetch2 to ...
std::vector< DecodeThreadInfo > decodeInfo
InstSeqNum execSeqNum
Source of execSeqNums to number instructions.
DecodeThreadInfo()
Default Constructor.
Latch< ForwardInstData >::Output inp
Input port carrying macro instructions from Fetch2.
ThreadID getScheduledThread()
Use the current threading policy to determine the next thread to decode from.
Classes for buffer, queue and FIFO behaviour.
bool processMoreThanOneInput
If true, more than one input word can be processed each cycle if there is room in the output to conta...
int16_t ThreadID
Thread index/ID type.
void evaluate()
Pass on input/buffer data to the output if you can.
DecodeThreadInfo(const DecodeThreadInfo &other)
GenericISA::SimplePCState< MachInst > PCState
The dynamic instruction and instruction/line id (sequence numbers) definition for Minor...
const ForwardInstData * getInput(ThreadID tid)
Get a piece of data to work on, or 0 if there is no data.
MinorCPU is an in-order CPU model with four fixed pipeline stages:
bool inMacroop
True when we're in the process of decomposing a micro-op and microopPC will be valid.
Forward flowing data between Fetch2,Decode,Execute carrying a packet of instructions of a width appro...
void popInput(ThreadID tid)
Pop an element off the input buffer, if there are any.
unsigned int outputWidth
Width of output of this stage/input of next in instructions.