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gem5
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Classes | |
| class | PCState |
Typedefs | |
| typedef uint64_t | IntReg |
| typedef uint32_t | FloatRegBits |
| typedef float | FloatReg |
| typedef uint8_t | CCReg |
| typedef uint64_t | MiscReg |
| typedef uint32_t | MachInst |
Functions | |
| uint64_t | getArgument (ThreadContext *tc, int &number, uint16_t size, bool fp) |
| void | startupCPU (ThreadContext *tc, int cpuId) |
Variables | |
| const Addr | PageShift = 12 |
| const Addr | PageBytes = ULL(1) << PageShift |
| typedef uint8_t NullISA::CCReg |
Definition at line 50 of file registers.hh.
| typedef float NullISA::FloatReg |
Definition at line 49 of file registers.hh.
| typedef uint32_t NullISA::FloatRegBits |
Definition at line 48 of file registers.hh.
| typedef uint64_t NullISA::IntReg |
Definition at line 47 of file registers.hh.
| typedef uint32_t NullISA::MachInst |
| typedef uint64_t NullISA::MiscReg |
Definition at line 51 of file registers.hh.
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inline |
Definition at line 48 of file utility.hh.
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inline |
Definition at line 51 of file utility.hh.
Definition at line 52 of file isa_traits.hh.
| const Addr NullISA::PageShift = 12 |
Definition at line 51 of file isa_traits.hh.