#include "arch/power/types.hh"
#include "base/types.hh"
#include "cpu/static_inst_fwd.hh"

Variables
StaticInstPtr	PowerISA::decodeInst (ExtMachInst)

const Addr	PowerISA::PageShift = 12

const Addr	PowerISA::PageBytes = ULL(1) << PageShift

const Addr	PowerISA::Page_Mask = ~(PageBytes - 1)

const Addr	PowerISA::PageOffset = PageBytes - 1

const Addr	PowerISA::PteShift = 3

const Addr	PowerISA::NPtePageShift = PageShift - PteShift

const Addr	PowerISA::NPtePage = ULL(1) << NPtePageShift

const Addr	PowerISA::PteMask = NPtePage - 1

const int	PowerISA::MachineBytes = 4

const ExtMachInst	PowerISA::NoopMachInst = 0x60000000

const bool	PowerISA::HasUnalignedMemAcc = true

const bool	PowerISA::CurThreadInfoImplemented = false

const int	PowerISA::CurThreadInfoReg = -1

Macro Definition Documentation

#define ISA_HAS_DELAY_SLOT 0

Definition at line 52 of file isa_traits.hh.

Namespaces