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    gem5
    
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#include "arch/sparc/sparc_traits.hh"#include "arch/sparc/types.hh"#include "base/types.hh"#include "cpu/static_inst_fwd.hh"Go to the source code of this file.
Namespaces | |
| BigEndianGuest | |
| SparcISA | |
Macros | |
| #define | ISA_HAS_DELAY_SLOT 1 | 
Functions | |
| StaticInstPtr | SparcISA::decodeInst (ExtMachInst) | 
Variables | |
| const MachInst | SparcISA::NoopMachInst = 0x01000000 | 
| const Addr | SparcISA::SegKPMEnd = ULL(0xfffffffc00000000) | 
| const Addr | SparcISA::SegKPMBase = ULL(0xfffffac000000000) | 
| const Addr | SparcISA::PageShift = 13 | 
| const Addr | SparcISA::PageBytes = ULL(1) << PageShift | 
| const Addr | SparcISA::StartVAddrHole = ULL(0x0000800000000000) | 
| const Addr | SparcISA::EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF) | 
| const Addr | SparcISA::VAddrAMask = ULL(0xFFFFFFFF) | 
| const Addr | SparcISA::PAddrImplMask = ULL(0x000000FFFFFFFFFF) | 
| const Addr | SparcISA::BytesInPageMask = ULL(0x1FFF) | 
| const bool | SparcISA::HasUnalignedMemAcc = false | 
| const bool | SparcISA::CurThreadInfoImplemented = false | 
| const int | SparcISA::CurThreadInfoReg = -1 | 
| #define ISA_HAS_DELAY_SLOT 1 | 
Definition at line 48 of file isa_traits.hh.