gem5
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#include <pcireg.h>
Public Attributes | |
uint8_t | data [64] |
struct { | |
uint16_t vendor | |
uint16_t device | |
uint16_t command | |
uint16_t status | |
uint8_t revision | |
uint8_t progIF | |
uint8_t subClassCode | |
uint8_t classCode | |
uint8_t cacheLineSize | |
uint8_t latencyTimer | |
uint8_t headerType | |
uint8_t bist | |
uint32_t baseAddr [6] | |
uint32_t cardbusCIS | |
uint16_t subsystemVendorID | |
uint16_t subsystemID | |
uint32_t expansionROM | |
uint8_t capabilityPtr | |
uint8_t reserved [7] | |
uint8_t interruptLine | |
uint8_t interruptPin | |
uint8_t minimumGrant | |
uint8_t maximumLatency | |
}; | |
struct { ... } |
uint32_t PCIConfig::baseAddr[6] |
Definition at line 72 of file pcireg.h.
Referenced by PciDevice::PciDevice(), and PciDevice::writeConfig().
uint8_t PCIConfig::bist |
Definition at line 71 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint8_t PCIConfig::cacheLineSize |
Definition at line 68 of file pcireg.h.
Referenced by PciDevice::PciDevice(), and PciDevice::writeConfig().
uint8_t PCIConfig::capabilityPtr |
Definition at line 77 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint32_t PCIConfig::cardbusCIS |
Definition at line 73 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint8_t PCIConfig::classCode |
Definition at line 67 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint16_t PCIConfig::command |
Definition at line 62 of file pcireg.h.
Referenced by IdeController::IdeController(), PciDevice::PciDevice(), Sinic::Device::read(), Sinic::Device::write(), IdeController::writeConfig(), and PciDevice::writeConfig().
uint8_t PCIConfig::data[64] |
Definition at line 57 of file pcireg.h.
Referenced by PciDevice::readConfig(), PciDevice::serialize(), PciDevice::unserialize(), and NSGigE::writeConfig().
uint16_t PCIConfig::device |
Definition at line 61 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint32_t PCIConfig::expansionROM |
Definition at line 76 of file pcireg.h.
Referenced by PciDevice::PciDevice(), and PciDevice::writeConfig().
uint8_t PCIConfig::headerType |
Definition at line 70 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint8_t PCIConfig::interruptLine |
Definition at line 82 of file pcireg.h.
Referenced by PciDevice::interruptLine(), PciDevice::PciDevice(), and PciDevice::writeConfig().
uint8_t PCIConfig::interruptPin |
Definition at line 83 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint8_t PCIConfig::latencyTimer |
Definition at line 69 of file pcireg.h.
Referenced by PciDevice::PciDevice(), and PciDevice::writeConfig().
uint8_t PCIConfig::maximumLatency |
Definition at line 85 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint8_t PCIConfig::minimumGrant |
Definition at line 84 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint8_t PCIConfig::progIF |
Definition at line 65 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint8_t PCIConfig::reserved[7] |
Definition at line 81 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint8_t PCIConfig::revision |
Definition at line 64 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint16_t PCIConfig::status |
Definition at line 63 of file pcireg.h.
Referenced by PciDevice::PciDevice(), and PciDevice::writeConfig().
uint8_t PCIConfig::subClassCode |
Definition at line 66 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint16_t PCIConfig::subsystemID |
Definition at line 75 of file pcireg.h.
Referenced by PciDevice::PciDevice(), and PciVirtIO::PciVirtIO().
uint16_t PCIConfig::subsystemVendorID |
Definition at line 74 of file pcireg.h.
Referenced by PciDevice::PciDevice().
uint16_t PCIConfig::vendor |
Definition at line 60 of file pcireg.h.
Referenced by PciDevice::PciDevice().