#include "arch/arm/generated/max_inst_regs.hh"
#include "arch/arm/intregs.hh"
#include "arch/arm/ccregs.hh"
#include "arch/arm/miscregs.hh"

Variables
const int	ArmISA::MaxInstSrcRegs

const int	ArmISA::NumIntArchRegs = NUM_ARCH_INTREGS

const int	ArmISA::NumFloatV7ArchRegs = 64

const int	ArmISA::NumFloatV8ArchRegs = 128

const int	ArmISA::NumFloatSpecialRegs = 32

const int	ArmISA::NumIntRegs = NUM_INTREGS

const int	ArmISA::NumFloatRegs = NumFloatV8ArchRegs + NumFloatSpecialRegs

const int	ArmISA::NumCCRegs = NUM_CCREGS

const int	ArmISA::NumMiscRegs = NUM_MISCREGS

const int	ArmISA::TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs

const int	ArmISA::ReturnValueReg = 0

const int	ArmISA::ReturnValueReg1 = 1

const int	ArmISA::ReturnValueReg2 = 2

const int	ArmISA::NumArgumentRegs = 4

const int	ArmISA::NumArgumentRegs64 = 8

const int	ArmISA::ArgumentReg0 = 0

const int	ArmISA::ArgumentReg1 = 1

const int	ArmISA::ArgumentReg2 = 2

const int	ArmISA::ArgumentReg3 = 3

const int	ArmISA::FramePointerReg = 11

const int	ArmISA::StackPointerReg = INTREG_SP

const int	ArmISA::ReturnAddressReg = INTREG_LR

const int	ArmISA::PCReg = INTREG_PC

const int	ArmISA::ZeroReg = INTREG_ZERO

const int	ArmISA::SyscallNumReg = ReturnValueReg

const int	ArmISA::SyscallPseudoReturnReg = ReturnValueReg

const int	ArmISA::SyscallSuccessReg = ReturnValueReg

const int	ArmISA::FP_Reg_Base = NumIntRegs * (MODE_MAXMODE + 1)

const int	ArmISA::CC_Reg_Base = FP_Reg_Base + NumFloatRegs

const int	ArmISA::Misc_Reg_Base = CC_Reg_Base + NumCCRegs

const int	ArmISA::Max_Reg_Index = Misc_Reg_Base + NumMiscRegs

Macro Definition Documentation

#define ISA_HAS_CC_REGS

Definition at line 87 of file registers.hh.

Classes