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gem5
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gem5
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#include "arch/arm/utility.hh"#include <memory>#include "arch/arm/faults.hh"#include "arch/arm/isa_traits.hh"#include "arch/arm/system.hh"#include "arch/arm/tlb.hh"#include "arch/arm/vtophys.hh"#include "cpu/base.hh"#include "cpu/checker/cpu.hh"#include "cpu/thread_context.hh"#include "mem/fs_translating_port_proxy.hh"#include "sim/full_system.hh"Go to the source code of this file.
Namespaces | |
| ArmISA | |
Functions | |
| void | ArmISA::initCPU (ThreadContext *tc, int cpuId) |
| uint64_t | ArmISA::getArgument (ThreadContext *tc, int &number, uint16_t size, bool fp) |
| void | ArmISA::skipFunction (ThreadContext *tc) |
| void | ArmISA::copyRegs (ThreadContext *src, ThreadContext *dest) |
| bool | ArmISA::inSecureState (ThreadContext *tc) |
| bool | ArmISA::inAArch64 (ThreadContext *tc) |
| bool | ArmISA::longDescFormatInUse (ThreadContext *tc) |
| uint32_t | ArmISA::getMPIDR (ArmSystem *arm_sys, ThreadContext *tc) |
| bool | ArmISA::ELIs64 (ThreadContext *tc, ExceptionLevel el) |
| bool | ArmISA::isBigEndian64 (ThreadContext *tc) |
| Addr | ArmISA::purifyTaggedAddr (Addr addr, ThreadContext *tc, ExceptionLevel el, TTBCR tcr) |
| Removes the tag from tagged addresses if that mode is enabled. More... | |
| Addr | ArmISA::purifyTaggedAddr (Addr addr, ThreadContext *tc, ExceptionLevel el) |
| Addr | ArmISA::truncPage (Addr addr) |
| Addr | ArmISA::roundPage (Addr addr) |
| bool | ArmISA::mcrMrc15TrapToHyp (const MiscRegIndex miscReg, HCR hcr, CPSR cpsr, SCR scr, HDCR hdcr, HSTR hstr, HCPTR hcptr, uint32_t iss) |
| bool | ArmISA::mcrMrc14TrapToHyp (const MiscRegIndex miscReg, HCR hcr, CPSR cpsr, SCR scr, HDCR hdcr, HSTR hstr, HCPTR hcptr, uint32_t iss) |
| bool | ArmISA::mcrrMrrc15TrapToHyp (const MiscRegIndex miscReg, CPSR cpsr, SCR scr, HSTR hstr, HCR hcr, uint32_t iss) |
| bool | ArmISA::msrMrs64TrapToSup (const MiscRegIndex miscReg, ExceptionLevel el, CPACR cpacr) |
| bool | ArmISA::msrMrs64TrapToHyp (const MiscRegIndex miscReg, ExceptionLevel el, bool isRead, CPTR cptr, HCR hcr, bool *isVfpNeon) |
| bool | ArmISA::msrMrs64TrapToMon (const MiscRegIndex miscReg, CPTR cptr, ExceptionLevel el, bool *isVfpNeon) |
| bool | ArmISA::decodeMrsMsrBankedReg (uint8_t sysM, bool r, bool &isIntReg, int ®Idx, CPSR cpsr, SCR scr, NSACR nsacr, bool checkSecurity) |
| bool | ArmISA::SPAlignmentCheckEnabled (ThreadContext *tc) |
| int | ArmISA::decodePhysAddrRange64 (uint8_t pa_enc) |
| Returns the n. More... | |
| uint8_t | ArmISA::encodePhysAddrRange64 (int pa_size) |
| Returns the encoding corresponding to the specified n. More... | |