| _destRegIdx | StaticInst | protected |
| _numCCDestRegs | StaticInst | protected |
| _numDestRegs | StaticInst | protected |
| _numFPDestRegs | StaticInst | protected |
| _numIntDestRegs | StaticInst | protected |
| _numSrcRegs | StaticInst | protected |
| _opClass | StaticInst | protected |
| _srcRegIdx | StaticInst | protected |
| advancePC(PowerISA::PCState &pcState) const | PowerISA::PowerStaticInst | inlineprotected |
| StaticInst::advancePC(TheISA::PCState &pcState) const =0 | StaticInst | pure virtual |
| bi | PowerISA::BranchCond | protected |
| bo | PowerISA::BranchCond | protected |
| BranchCond(const char *mnem, MachInst _machInst, OpClass __opClass) | PowerISA::BranchCond | inlineprotected |
| BranchNonPCRelCond(const char *mnem, MachInst _machInst, OpClass __opClass) | PowerISA::BranchNonPCRelCond | inlineprotected |
| branchTarget(const PowerISA::PCState &pc) const | PowerISA::BranchNonPCRelCond | protected |
| PowerISA::BranchCond::branchTarget(const TheISA::PCState &pc) const | StaticInst | virtual |
| PowerISA::BranchCond::branchTarget(ThreadContext *tc) const | StaticInst | virtual |
| cachedDisassembly | StaticInst | mutableprotected |
| cachedPC | PowerISA::PCDependentDisassembly | mutableprotected |
| cachedSymtab | PowerISA::PCDependentDisassembly | mutableprotected |
| completeAcc(Packet *pkt, ExecContext *xc, Trace::InstRecord *traceData) const | StaticInst | inlinevirtual |
| condOk(uint32_t cr) const | PowerISA::BranchCond | inlineprotected |
| ctrOk(uint32_t &ctr) const | PowerISA::BranchCond | inlineprotected |
| decref() | RefCounted | inline |
| destRegIdx(int i) const | StaticInst | inline |
| disassemble(Addr pc, const SymbolTable *symtab) const | PowerISA::PCDependentDisassembly | protectedvirtual |
| eaComp(ExecContext *xc, Trace::InstRecord *traceData) const | StaticInst | inlinevirtual |
| eaCompInst() const | StaticInst | inlinevirtual |
| execute(ExecContext *xc, Trace::InstRecord *traceData) const =0 | StaticInst | pure virtual |
| ExtMachInst typedef | StaticInst | |
| fetchMicroop(MicroPC upc) const | StaticInst | virtual |
| flags | StaticInst | protected |
| generateDisassembly(Addr pc, const SymbolTable *symtab) const | PowerISA::BranchNonPCRelCond | protectedvirtual |
| getName() | StaticInst | inline |
| hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc, TheISA::PCState &tgt) const | StaticInst | |
| incref() | RefCounted | inline |
| initiateAcc(ExecContext *xc, Trace::InstRecord *traceData) const | StaticInst | inlinevirtual |
| insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const | PowerISA::PowerStaticInst | inlineprotected |
| isCall() const | StaticInst | inline |
| isCC() const | StaticInst | inline |
| isCondCtrl() const | StaticInst | inline |
| isCondDelaySlot() const | StaticInst | inline |
| isControl() const | StaticInst | inline |
| isDataPrefetch() const | StaticInst | inline |
| isDelayedCommit() const | StaticInst | inline |
| isDirectCtrl() const | StaticInst | inline |
| isFirstMicroop() const | StaticInst | inline |
| isFloating() const | StaticInst | inline |
| isIndirectCtrl() const | StaticInst | inline |
| isInstPrefetch() const | StaticInst | inline |
| isInteger() const | StaticInst | inline |
| isIprAccess() const | StaticInst | inline |
| isLastMicroop() const | StaticInst | inline |
| isLoad() const | StaticInst | inline |
| isMacroop() const | StaticInst | inline |
| isMemBarrier() const | StaticInst | inline |
| isMemRef() const | StaticInst | inline |
| isMicroBranch() const | StaticInst | inline |
| isMicroop() const | StaticInst | inline |
| isNonSpeculative() const | StaticInst | inline |
| isNop() const | StaticInst | inline |
| isPrefetch() const | StaticInst | inline |
| isQuiesce() const | StaticInst | inline |
| isReturn() const | StaticInst | inline |
| isSerializeAfter() const | StaticInst | inline |
| isSerializeBefore() const | StaticInst | inline |
| isSerializing() const | StaticInst | inline |
| isSquashAfter() const | StaticInst | inline |
| isStore() const | StaticInst | inline |
| isStoreConditional() const | StaticInst | inline |
| isSyscall() const | StaticInst | inline |
| isThreadSync() const | StaticInst | inline |
| isUncondCtrl() const | StaticInst | inline |
| isUnverifiable() const | StaticInst | inline |
| isWriteBarrier() const | StaticInst | inline |
| machInst | StaticInst | |
| MaxInstDestRegs enum value | StaticInst | |
| MaxInstSrcRegs enum value | StaticInst | |
| memAccInst() const | StaticInst | inlinevirtual |
| mnemonic | StaticInst | protected |
| nullStaticInstPtr | StaticInst | static |
| numCCDestRegs() const | StaticInst | inline |
| numDestRegs() const | StaticInst | inline |
| numFPDestRegs() const | StaticInst | inline |
| numIntDestRegs() const | StaticInst | inline |
| numSrcRegs() const | StaticInst | inline |
| opClass() const | StaticInst | inline |
| PCDependentDisassembly(const char *mnem, ExtMachInst _machInst, OpClass __opClass) | PowerISA::PCDependentDisassembly | inlineprotected |
| PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass) | PowerISA::PowerStaticInst | inlineprotected |
| printFlags(std::ostream &outs, const std::string &separator) const | StaticInst | |
| printReg(std::ostream &os, int reg) const | PowerISA::PowerStaticInst | protected |
| RefCounted() | RefCounted | inline |
| RegIndex typedef | StaticInst | |
| setDelayedCommit() | StaticInst | inline |
| setFirstMicroop() | StaticInst | inline |
| setFlag(Flags f) | StaticInst | inline |
| setLastMicroop() | StaticInst | inline |
| srcRegIdx(int i) const | StaticInst | inline |
| StaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass) | StaticInst | inlineprotected |
| targetAddr | PowerISA::BranchNonPCRelCond | protected |
| ~RefCounted() | RefCounted | inlinevirtual |
| ~StaticInst() | StaticInst | virtual |
