38 #ifndef __DEV_MALTA_HH__
39 #define __DEV_MALTA_HH__
42 #include "params/Malta.hh"
113 panic(
"Need implementation\n");
120 panic(
"Need implementation\n");
127 panic(
"Need implementation\n");
135 #endif // __DEV_MALTA_HH__
void unserialize(CheckpointIn &cp) override
Unserialize an object.
int ipi_pending[Malta::Max_CPUs]
Addr calcPciMemAddr(Addr addr)
virtual Addr pciToDma(Addr pciAddr) const
void serialize(CheckpointOut &cp) const override
Serialize an object.
Device model for an Intel PIIX4 IDE controller.
Addr calcPciConfigAddr(int bus, int dev, int func)
System * system
Pointer to the system.
Malta CChip CSR Emulation.
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.
static const int Max_CPUs
Max number of CPUs in a Malta.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
MaltaIO * io
Pointer to the MaltaIO device which has the RTC.
Top level class for Malta Chipset emulation.
std::ostream CheckpointOut
void clearConsoleInt() override
Clear a posted CPU interrupt (id=55)
Addr calcPciIOAddr(Addr addr)
MaltaParams Params
Constructor for the Malta Class.
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
MaltaCChip * cchip
Pointer to the Malta CChip.
Malta I/O device is a catch all for all the south bridge stuff we care to implement.
int intr_sum_type[Malta::Max_CPUs]