42 #include "config/the_isa.hh"
44 #include "debug/Malta.hh"
48 #include "params/Malta.hh"
52 using namespace TheISA;
78 panic(
"Malta::postPciInt() has not been implemented.");
84 panic(
"Malta::clearPciInt() has not been implemented.");
90 panic(
"Malta::pciToDma() has not been implemented.");
106 MaltaParams::create()
108 return new Malta(
this);
Emulation of the Malta CChip CSRs.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
virtual Addr pciToDma(Addr pciAddr) const
void serialize(CheckpointOut &cp) const override
Serialize an object.
void postIntr(uint8_t interrupt)
Post an Interrupt to the CPU.
void clearIntr(uint8_t interrupt)
Clear an Interrupt to the CPU.
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.
static const int Max_CPUs
Max number of CPUs in a Malta.
#define SERIALIZE_ARRAY(member, size)
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
MaltaIO * io
Pointer to the MaltaIO device which has the RTC.
Top level class for Malta Chipset emulation.
#define UNSERIALIZE_ARRAY(member, size)
std::ostream CheckpointOut
void clearConsoleInt() override
Clear a posted CPU interrupt (id=55)
MaltaParams Params
Constructor for the Malta Class.
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
int intr_sum_type[Malta::Max_CPUs]
Malta I/O Space mapping including RTC/timer interrupts.
Declaration of top level class for the Malta chipset.