#include "arch/mips/types.hh"
#include "base/types.hh"
#include "cpu/static_inst_fwd.hh"

Enumerations
enum	MipsISA::InterruptLevels { MipsISA::INTLEVEL_SOFTWARE_MIN = 4, MipsISA::INTLEVEL_SOFTWARE_MAX = 19, MipsISA::INTLEVEL_EXTERNAL_MIN = 20, MipsISA::INTLEVEL_EXTERNAL_MAX = 34, MipsISA::INTLEVEL_IRQ0 = 20, MipsISA::INTLEVEL_IRQ1 = 21, MipsISA::INTINDEX_ETHERNET = 0, MipsISA::INTINDEX_SCSI = 1, MipsISA::INTLEVEL_IRQ2 = 22, MipsISA::INTLEVEL_IRQ3 = 23, MipsISA::INTLEVEL_SERIAL = 33, MipsISA::NumInterruptLevels = INTLEVEL_EXTERNAL_MAX }

enum	MipsISA::mode_type { MipsISA::mode_kernel = 0, MipsISA::mode_supervisor = 1, MipsISA::mode_user = 2, MipsISA::mode_debug = 3, MipsISA::mode_number }

Functions
StaticInstPtr	MipsISA::decodeInst (ExtMachInst)

Addr	MipsISA::Phys2K0Seg (Addr addr)

Addr	MipsISA::VAddrImpl (Addr a)

Addr	MipsISA::VAddrVPN (Addr a)

Addr	MipsISA::VAddrOffset (Addr a)

Variables
const Addr	MipsISA::PageShift = 13

const Addr	MipsISA::PageBytes = ULL(1) << PageShift

const Addr	MipsISA::Page_Mask = ~(PageBytes - 1)

const Addr	MipsISA::PageOffset = PageBytes - 1

const Addr	MipsISA::PteShift = 3

const Addr	MipsISA::NPtePageShift = PageShift - PteShift

const Addr	MipsISA::NPtePage = ULL(1) << NPtePageShift

const Addr	MipsISA::PteMask = NPtePage - 1

const Addr	MipsISA::USegBase = ULL(0x0)

const Addr	MipsISA::USegEnd = ULL(0x7FFFFFFF)

const Addr	MipsISA::KSeg0End = ULL(0x9FFFFFFF)

const Addr	MipsISA::KSeg0Base = ULL(0x80000000)

const Addr	MipsISA::KSeg0Mask = ULL(0x1FFFFFFF)

const Addr	MipsISA::KSeg1End = ULL(0xBFFFFFFF)

const Addr	MipsISA::KSeg1Base = ULL(0xA0000000)

const Addr	MipsISA::KSeg1Mask = ULL(0x1FFFFFFF)

const Addr	MipsISA::KSSegEnd = ULL(0xDFFFFFFF)

const Addr	MipsISA::KSSegBase = ULL(0xC0000000)

const Addr	MipsISA::KSeg3End = ULL(0xFFFFFFFF)

const Addr	MipsISA::KSeg3Base = ULL(0xE0000000)

const unsigned	MipsISA::VABits = 32

const unsigned	MipsISA::PABits = 32

const Addr	MipsISA::VAddrImplMask = (ULL(1) << VABits) - 1

const Addr	MipsISA::VAddrUnImplMask = ~VAddrImplMask

const Addr	MipsISA::PAddrImplMask = (ULL(1) << PABits) - 1

const ExtMachInst	MipsISA::NoopMachInst = 0x00000000

const int	MipsISA::ANNOTE_NONE = 0

const uint32_t	MipsISA::ITOUCH_ANNOTE = 0xffffffff

const bool	MipsISA::HasUnalignedMemAcc = true

const bool	MipsISA::CurThreadInfoImplemented = false

const int	MipsISA::CurThreadInfoReg = -1

Macro Definition Documentation

#define ISA_HAS_DELAY_SLOT 1

Definition at line 51 of file isa_traits.hh.

Namespaces