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gem5
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#include "arch/arm/isa.hh"#include "arch/arm/pmu.hh"#include "arch/arm/system.hh"#include "cpu/base.hh"#include "cpu/checker/cpu.hh"#include "debug/Arm.hh"#include "debug/MiscRegs.hh"#include "dev/arm/generic_timer.hh"#include "params/ArmISA.hh"#include "sim/faults.hh"#include "sim/stat_control.hh"#include "sim/system.hh"Go to the source code of this file.
Classes | |
| class | ArmISA::ISA |
| Some registers alias with others, and therefore need to be translated. More... | |
Namespaces | |
| ArmISA | |
Functions | |
| ArmISA::if (!pmu) pmu | |
| pmu | ArmISA::setISA (this) |
| ArmISA::if (FullSystem &&system) | |
| ArmISA::for (auto sw:MiscRegSwitch) | |
| Fill in the miscReg translation table. More... | |
| ArmISA::preUnflattenMiscReg () | |
| ArmISA::clear () | |
Variables | |
| ArmISA::system = dynamic_cast<ArmSystem *>(p->system) | |
| ArmISA::else | |
| ArmISA::haveSecurity = haveLPAE = haveVirtualization = false | |
| ArmISA::haveLargeAsid64 = false | |
| ArmISA::physAddrRange64 = 32 | |