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gem5
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gem5
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#include "base/misc.hh"#include "base/trace.hh"#include "config/the_isa.hh"#include "debug/TimeSync.hh"#include "sim/eventq_impl.hh"#include "sim/full_system.hh"#include "sim/root.hh"Go to the source code of this file.
Variables | |
| bool | FullSystem |
| The FullSystem variable can be used to determine the current mode of simulation. More... | |
| unsigned int | FullSystemInt |
| In addition to the boolean flag we make use of an unsigned int since the CPU instruction decoder makes use of the variable in switch statements. More... | |
| bool FullSystem |
The FullSystem variable can be used to determine the current mode of simulation.
Definition at line 146 of file root.cc.
Referenced by SparcISA::RemoteGDB::acc(), MipsISA::RemoteGDB::acc(), PowerISA::RemoteGDB::acc(), AlphaISA::RemoteGDB::acc(), RiscvISA::RemoteGDB::acc(), X86ISA::RemoteGDB::acc(), ArmISA::RemoteGDB::acc(), PseudoInst::addsymbol(), PseudoInst::arm(), BaseKvmCPU::BaseKvmCPU(), BaseSimpleCPU::BaseSimpleCPU(), ArmISA::canWriteAArch64SysReg(), Minor::Execute::checkInterrupts(), ArmISA::ISA::clear(), DefaultCommit< Impl >::commit(), DefaultCommit< Impl >::commitHead(), O3ThreadContext< class >::copyArchRegs(), SimpleThread::copyState(), X86ISA::TLB::finalizePhysical(), FullO3CPU< Impl >::FullO3CPU(), AlphaISA::getArgument(), SparcISA::getArgument(), ArmISA::getArgument(), ThreadState::getMemProxy(), ThreadState::getPhysProxy(), ThreadState::getVirtProxy(), Minor::Execute::hasInterrupt(), ArmSystem::haveLPAE(), ArmSystem::haveSecurity(), ArmSystem::haveVirtualization(), ArmSystem::highestEL(), ArmSystem::highestELIs64(), BaseKvmCPU::init(), BaseSimpleCPU::init(), MinorCPU::init(), FullO3CPU< Impl >::init(), ThreadState::initMemProxies(), PseudoInst::initParam(), System::initState(), FullO3CPU< Impl >::insertThread(), X86ISA::inUserMode(), FaultBase::invoke(), AlphaISA::AlphaFault::invoke(), SparcISA::SparcFaultBase::invoke(), X86ISA::X86FaultBase::invoke(), GenericPageTableFault::invoke(), RiscvISA::RiscvFault::invoke(), MipsISA::MipsFaultBase::invoke(), AlphaISA::ArithmeticFault::invoke(), X86ISA::X86Trap::invoke(), MipsISA::ResetFault::invoke(), AlphaISA::DtbFault::invoke(), AlphaISA::NDtbMissFault::invoke(), MipsISA::CoprocessorUnusableFault::invoke(), ArmISA::ArmFault::invoke(), MipsISA::AddressFault< TlbInvalidFault >::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), SparcISA::SpillNNormal::invoke(), AlphaISA::ItbFault::invoke(), X86ISA::InvalidOpcode::invoke(), ArmISA::Reset::invoke(), MipsISA::TlbFault< TlbInvalidFault >::invoke(), SparcISA::FillNNormal::invoke(), AlphaISA::ItbPageFault::invoke(), SparcISA::TrapInstruction::invoke(), ArmISA::UndefinedInstruction::invoke(), ArmISA::SupervisorCall::invoke(), ArmISA::SecureMonitorCall::invoke(), X86ISA::PageFault::invoke(), ArmISA::ArmSev::invoke(), PseudoInst::loadsymbol(), MinorCPU::MinorCPU(), AlphaISA::Decoder::moreBytes(), O3ThreadState< Impl >::O3ThreadState(), BaseSimpleCPU::postExecute(), BaseRemoteGDB::read(), PseudoInst::readfile(), RubyPort::PioMasterPort::recvRangeChange(), SimpleThread::regStats(), O3ThreadContext< class >::regStats(), X86ISA::Interrupts::requestInterrupt(), ThreadState::serialize(), Root::serialize(), System::serialize(), SparcISA::ISA::setFSReg(), CheckerCPU::setSystem(), DefaultDecode< Impl >::squash(), SparcISA::startupCPU(), X86ISA::startupCPU(), BaseO3DynInst< Impl >::syscall(), Minor::ExecContext::syscall(), SimpleExecContext::syscall(), System::System(), takeOverFrom(), FullO3CPU< Impl >::tick(), DefaultFetch< Impl >::tick(), Trace::ExeTracerRecord::traceInst(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), GenericTLB::translateAtomic(), PowerISA::TLB::translateAtomic(), ArmISA::TLB::translateAtomic(), ArmISA::TLB::translateComplete(), RiscvISA::TLB::translateData(), MipsISA::TLB::translateData(), SparcISA::TLB::translateData(), ArmISA::TLB::translateFunctional(), RiscvISA::TLB::translateInst(), MipsISA::TLB::translateInst(), AlphaISA::TLB::translateInst(), SparcISA::TLB::translateInst(), ThreadState::unserialize(), System::unserialize(), Checker< Impl >::verify(), and BaseRemoteGDB::write().