| _params | SimObject | protected |
| addEventProbe(unsigned int id, SimObject *obj, const char *name) | ArmISA::PMU | |
| ARCH_EVENT_SW_INCR | ArmISA::PMU | protectedstatic |
| BaseISADevice() | ArmISA::BaseISADevice | |
| BitUnion32(PMCR_t) Bitfield< 0 > e | ArmISA::PMU | protected |
| c | ArmISA::PMU | protected |
| ckptCount | Serializable | static |
| ckptMaxCount | Serializable | static |
| ckptPrevCount | Serializable | static |
| clock_remainder | ArmISA::PMU | protected |
| counters | ArmISA::PMU | protected |
| currentSection() | Serializable | static |
| cycleCounter | ArmISA::PMU | protected |
| d | ArmISA::PMU | protected |
| deschedule(Event &event) | EventManager | inline |
| deschedule(Event *event) | EventManager | inline |
| dp | ArmISA::PMU | protected |
| drain() override | SimObject | inlinevirtual |
| Drainable() | Drainable | protected |
| drainResume() override | ArmISA::PMU | virtual |
| drainState() const | Drainable | inline |
| EndBitUnion(PMCR_t) BitUnion32(PMSELR_t) Bitfield<4 | ArmISA::PMU | protected |
| EndBitUnion(PMSELR_t) BitUnion32(PMEVTYPER_t) Bitfield<9 | ArmISA::PMU | protected |
| EndBitUnion(PMEVTYPER_t) typedef unsigned int CounterId | ArmISA::PMU | protected |
| EventManager(EventManager &em) | EventManager | inline |
| EventManager(EventManager *em) | EventManager | inline |
| EventManager(EventQueue *eq) | EventManager | inline |
| eventq | EventManager | protected |
| eventQueue() const | EventManager | inline |
| EventTypeId typedef | ArmISA::PMU | protected |
| evtCount | ArmISA::PMU | protected |
| find(const char *name) | SimObject | static |
| getCounter(CounterId id) | ArmISA::PMU | inlineprotected |
| getCounter(CounterId id) const | ArmISA::PMU | inlineprotected |
| getCounterTypeRegister(CounterId id) const | ArmISA::PMU | protected |
| getCounterValue(CounterId id) const | ArmISA::PMU | inlineprotected |
| getProbeManager() | SimObject | |
| handleEvent(CounterId id, uint64_t delta) | ArmISA::PMU | protected |
| idcode | ArmISA::PMU | protected |
| imp | ArmISA::PMU | protected |
| init() | SimObject | virtual |
| initState() | SimObject | virtual |
| isa | ArmISA::BaseISADevice | protected |
| isFiltered(const CounterState &ctr) const | ArmISA::PMU | protected |
| isValidCounter(CounterId id) const | ArmISA::PMU | inlineprotected |
| lc | ArmISA::PMU | protected |
| loadState(CheckpointIn &cp) | SimObject | virtual |
| m | ArmISA::PMU | protected |
| memInvalidate() | SimObject | inlinevirtual |
| memWriteback() | SimObject | inlinevirtual |
| n | ArmISA::PMU | protected |
| name() const | SimObject | inlinevirtual |
| notifyFork() | Drainable | inlinevirtual |
| nsh | ArmISA::PMU | protected |
| nsk | ArmISA::PMU | protected |
| nsu | ArmISA::PMU | protected |
| p | ArmISA::PMU | protected |
| p | ArmISA::PMU | protected |
| params() const | SimObject | inline |
| Params typedef | SimObject | |
| platform | ArmISA::PMU | protected |
| PMCCNTR | ArmISA::PMU | protectedstatic |
| PMU(const ArmPMUParams *p) | ArmISA::PMU | |
| pmuEventTypes | ArmISA::PMU | protected |
| pmuInterrupt | ArmISA::PMU | protected |
| ProbeListenerUPtr typedef | ArmISA::PMU | protected |
| raiseInterrupt() | ArmISA::PMU | protected |
| readMiscReg(int misc_reg) override | ArmISA::PMU | virtual |
| readMiscRegInt(int misc_reg) | ArmISA::PMU | protected |
| reg_pmceid | ArmISA::PMU | protected |
| reg_pmcnten | ArmISA::PMU | protected |
| reg_pmcr | ArmISA::PMU | protected |
| reg_pmcr_conf | ArmISA::PMU | protected |
| reg_pmcr_wr_mask | ArmISA::PMU | protectedstatic |
| reg_pminten | ArmISA::PMU | protected |
| reg_pmovsr | ArmISA::PMU | protected |
| reg_pmselr | ArmISA::PMU | protected |
| regProbeListeners() | SimObject | virtual |
| regProbePoints() | SimObject | virtual |
| regStats() | SimObject | virtual |
| reschedule(Event &event, Tick when, bool always=false) | EventManager | inline |
| reschedule(Event *event, Tick when, bool always=false) | EventManager | inline |
| resetEventCounts() | ArmISA::PMU | protected |
| resetStats() | SimObject | virtual |
| schedule(Event &event, Tick when) | EventManager | inline |
| schedule(Event *event, Tick when) | EventManager | inline |
| sel | ArmISA::PMU | protected |
| Serializable() | Serializable | |
| serialize(CheckpointOut &cp) const override | ArmISA::PMU | virtual |
| serializeAll(CheckpointOut &cp) | SimObject | static |
| Serializable::serializeAll(const std::string &cpt_dir) | Serializable | static |
| serializeSection(CheckpointOut &cp, const char *name) const | Serializable | |
| serializeSection(CheckpointOut &cp, const std::string &name) const | Serializable | inline |
| setControlReg(PMCR_t val) | ArmISA::PMU | protected |
| setCounterTypeRegister(CounterId id, PMEVTYPER_t type) | ArmISA::PMU | protected |
| setCounterValue(CounterId id, uint64_t val) | ArmISA::PMU | protected |
| setCurTick(Tick newVal) | EventManager | inline |
| setISA(ISA *isa) | ArmISA::BaseISADevice | virtual |
| setMiscReg(int misc_reg, MiscReg val) override | ArmISA::PMU | virtual |
| signalDrainDone() const | Drainable | inlineprotected |
| SimObject(const Params *_params) | SimObject | |
| startup() | SimObject | virtual |
| u | ArmISA::PMU | protected |
| unserialize(CheckpointIn &cp) override | ArmISA::PMU | virtual |
| unserializeGlobals(CheckpointIn &cp) | Serializable | static |
| unserializeSection(CheckpointIn &cp, const char *name) | Serializable | |
| unserializeSection(CheckpointIn &cp, const std::string &name) | Serializable | inline |
| updateAllCounters() | ArmISA::PMU | protected |
| updateCounter(CounterId id, CounterState &ctr) | ArmISA::PMU | protected |
| wakeupEventQueue(Tick when=(Tick)-1) | EventManager | inline |
| x | ArmISA::PMU | protected |
| ~BaseISADevice() | ArmISA::BaseISADevice | inlinevirtual |
| ~Drainable() | Drainable | protectedvirtual |
| ~PMU() | ArmISA::PMU | |
| ~Serializable() | Serializable | virtual |
| ~SimObject() | SimObject | virtual |
