gem5
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#include <gpu_static_inst.hh>
Public Member Functions | |
HsailGPUStaticInst (const BrigObject *obj, const std::string &opcode) | |
void | generateDisassembly () override |
int | instSize () const override |
bool | isValid () const override |
Public Member Functions inherited from GPUStaticInst | |
GPUStaticInst (const std::string &opcode) | |
void | instAddr (int inst_addr) |
int | instAddr () const |
int | nextInstAddr () const |
void | instNum (int num) |
int | instNum () |
void | ipdInstNum (int num) |
int | ipdInstNum () const |
virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
const std::string & | disassemble () |
virtual int | getNumOperands ()=0 |
virtual bool | isCondRegister (int operandIndex)=0 |
virtual bool | isScalarRegister (int operandIndex)=0 |
virtual bool | isVectorRegister (int operandIndex)=0 |
virtual bool | isSrcOperand (int operandIndex)=0 |
virtual bool | isDstOperand (int operandIndex)=0 |
virtual int | getOperandSize (int operandIndex)=0 |
virtual int | getRegisterIndex (int operandIndex, GPUDynInstPtr gpuDynInst)=0 |
virtual int | numDstRegOperands ()=0 |
virtual int | numSrcRegOperands ()=0 |
bool | isALU () const |
bool | isBranch () const |
bool | isNop () const |
bool | isReturn () const |
bool | isUnconditionalJump () const |
bool | isSpecialOp () const |
bool | isWaitcnt () const |
bool | isBarrier () const |
bool | isMemFence () const |
bool | isMemRef () const |
bool | isFlat () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isAtomicNoRet () const |
bool | isAtomicRet () const |
bool | isScalar () const |
bool | readsSCC () const |
bool | writesSCC () const |
bool | readsVCC () const |
bool | writesVCC () const |
bool | isAtomicAnd () const |
bool | isAtomicOr () const |
bool | isAtomicXor () const |
bool | isAtomicCAS () const |
bool | isAtomicExch () const |
bool | isAtomicAdd () const |
bool | isAtomicSub () const |
bool | isAtomicInc () const |
bool | isAtomicDec () const |
bool | isAtomicMax () const |
bool | isAtomicMin () const |
bool | isArgLoad () const |
bool | isGlobalMem () const |
bool | isLocalMem () const |
bool | isArgSeg () const |
bool | isGlobalSeg () const |
bool | isGroupSeg () const |
bool | isKernArgSeg () const |
bool | isPrivateSeg () const |
bool | isReadOnlySeg () const |
bool | isSpillSeg () const |
bool | isWorkitemScope () const |
bool | isWavefrontScope () const |
bool | isWorkgroupScope () const |
bool | isDeviceScope () const |
bool | isSystemScope () const |
bool | isNoScope () const |
bool | isRelaxedOrder () const |
bool | isAcquire () const |
bool | isRelease () const |
bool | isAcquireRelease () const |
bool | isNoOrder () const |
bool | isGloballyCoherent () const |
Coherence domain of a memory instruction. More... | |
bool | isSystemCoherent () const |
virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
virtual uint32_t | getTargetPc () |
void | setFlag (Flags flag) |
virtual void | execLdAcq (GPUDynInstPtr gpuDynInst) |
virtual void | execSt (GPUDynInstPtr gpuDynInst) |
virtual void | execAtomic (GPUDynInstPtr gpuDynInst) |
virtual void | execAtomicAcq (GPUDynInstPtr gpuDynInst) |
Protected Attributes | |
HsailCode * | hsailCode |
Protected Attributes inherited from GPUStaticInst | |
const std::string | opcode |
std::string | disassembly |
int | _instNum |
int | _instAddr |
int | _ipdInstNum |
Identifier of the immediate post-dominator instruction. More... | |
std::bitset< Num_Flags > | _flags |
Additional Inherited Members | |
Public Attributes inherited from GPUStaticInst | |
Enums::StorageClassType | executed_as |
Static Public Attributes inherited from GPUStaticInst | |
static uint64_t | dynamic_id_count |
Definition at line 53 of file gpu_static_inst.hh.
HsailISA::HsailGPUStaticInst::HsailGPUStaticInst | ( | const BrigObject * | obj, |
const std::string & | opcode | ||
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Definition at line 42 of file gpu_static_inst.cc.
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overridevirtual |
Implements GPUStaticInst.
Reimplemented in HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, HsailISA::LdaInst< DestDataType, AddrOperandType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Definition at line 49 of file gpu_static_inst.cc.
References GPUStaticInst::disassembly, and GPUStaticInst::opcode.
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inlineoverridevirtual |
Implements GPUStaticInst.
Definition at line 58 of file gpu_static_inst.hh.
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inlineoverridevirtual |
Implements GPUStaticInst.
Definition at line 59 of file gpu_static_inst.hh.
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protected |
Definition at line 62 of file gpu_static_inst.hh.