gem5
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#include <branch.hh>
Public Member Functions | |
void | generateDisassembly () override |
CbrInstBase (const Brig::BrigInstBase *ib, const BrigObject *obj) | |
uint32_t | getTargetPc () override |
void | execute (GPUDynInstPtr gpuDynInst) override |
bool | isVectorRegister (int operandIndex) override |
bool | isCondRegister (int operandIndex) override |
bool | isScalarRegister (int operandIndex) override |
bool | isSrcOperand (int operandIndex) override |
bool | isDstOperand (int operandIndex) override |
int | getOperandSize (int operandIndex) override |
int | getRegisterIndex (int operandIndex, GPUDynInstPtr gpuDynInst) override |
int | getNumOperands () override |
Public Member Functions inherited from HsailISA::HsailGPUStaticInst | |
HsailGPUStaticInst (const BrigObject *obj, const std::string &opcode) | |
void | generateDisassembly () override |
int | instSize () const override |
bool | isValid () const override |
Public Member Functions inherited from GPUStaticInst | |
GPUStaticInst (const std::string &opcode) | |
void | instAddr (int inst_addr) |
int | instAddr () const |
int | nextInstAddr () const |
void | instNum (int num) |
int | instNum () |
void | ipdInstNum (int num) |
int | ipdInstNum () const |
const std::string & | disassemble () |
virtual int | numDstRegOperands ()=0 |
virtual int | numSrcRegOperands ()=0 |
bool | isALU () const |
bool | isBranch () const |
bool | isNop () const |
bool | isReturn () const |
bool | isUnconditionalJump () const |
bool | isSpecialOp () const |
bool | isWaitcnt () const |
bool | isBarrier () const |
bool | isMemFence () const |
bool | isMemRef () const |
bool | isFlat () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isAtomicNoRet () const |
bool | isAtomicRet () const |
bool | isScalar () const |
bool | readsSCC () const |
bool | writesSCC () const |
bool | readsVCC () const |
bool | writesVCC () const |
bool | isAtomicAnd () const |
bool | isAtomicOr () const |
bool | isAtomicXor () const |
bool | isAtomicCAS () const |
bool | isAtomicExch () const |
bool | isAtomicAdd () const |
bool | isAtomicSub () const |
bool | isAtomicInc () const |
bool | isAtomicDec () const |
bool | isAtomicMax () const |
bool | isAtomicMin () const |
bool | isArgLoad () const |
bool | isGlobalMem () const |
bool | isLocalMem () const |
bool | isArgSeg () const |
bool | isGlobalSeg () const |
bool | isGroupSeg () const |
bool | isKernArgSeg () const |
bool | isPrivateSeg () const |
bool | isReadOnlySeg () const |
bool | isSpillSeg () const |
bool | isWorkitemScope () const |
bool | isWavefrontScope () const |
bool | isWorkgroupScope () const |
bool | isDeviceScope () const |
bool | isSystemScope () const |
bool | isNoScope () const |
bool | isRelaxedOrder () const |
bool | isAcquire () const |
bool | isRelease () const |
bool | isAcquireRelease () const |
bool | isNoOrder () const |
bool | isGloballyCoherent () const |
Coherence domain of a memory instruction. More... | |
bool | isSystemCoherent () const |
virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
void | setFlag (Flags flag) |
virtual void | execLdAcq (GPUDynInstPtr gpuDynInst) |
virtual void | execSt (GPUDynInstPtr gpuDynInst) |
virtual void | execAtomic (GPUDynInstPtr gpuDynInst) |
virtual void | execAtomicAcq (GPUDynInstPtr gpuDynInst) |
Public Attributes | |
Brig::BrigWidth8_t | width |
CRegOperand | cond |
TargetType | target |
Public Attributes inherited from GPUStaticInst | |
Enums::StorageClassType | executed_as |
Additional Inherited Members | |
Static Public Attributes inherited from GPUStaticInst | |
static uint64_t | dynamic_id_count |
Protected Attributes inherited from HsailISA::HsailGPUStaticInst | |
HsailCode * | hsailCode |
Protected Attributes inherited from GPUStaticInst | |
const std::string | opcode |
std::string | disassembly |
int | _instNum |
int | _instAddr |
int | _ipdInstNum |
Identifier of the immediate post-dominator instruction. More... | |
std::bitset< Num_Flags > | _flags |
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inline |
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overridevirtual |
TODO: can we move this pop outside the instruction, and into the wavefront?
Implements GPUStaticInst.
Definition at line 260 of file branch.hh.
References Wavefront::computeUnit, ArmISA::cond, Wavefront::execMask(), M5_VAR_USED, Wavefront::pc(), Wavefront::popFromReconvergenceStack(), Wavefront::pushToReconvergenceStack(), Wavefront::rpc(), MipsISA::w, and ComputeUnit::wfSize().
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overridevirtual |
Implements GPUStaticInst.
Definition at line 246 of file branch.hh.
References ArmISA::cond, csprintf(), ArmISA::opcode, and ArmISA::width.
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inlineoverridevirtual |
Implements GPUStaticInst.
Definition at line 239 of file branch.hh.
Referenced by HsailISA::CbrInstBase< SRegOperand >::getOperandSize(), HsailISA::CbrInstBase< SRegOperand >::getRegisterIndex(), HsailISA::CbrInstBase< SRegOperand >::isCondRegister(), HsailISA::CbrInstBase< SRegOperand >::isScalarRegister(), HsailISA::CbrInstBase< SRegOperand >::isSrcOperand(), and HsailISA::CbrInstBase< SRegOperand >::isVectorRegister().
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inlineoverridevirtual |
Implements GPUStaticInst.
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inlineoverridevirtual |
Implements GPUStaticInst.
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inlineoverridevirtual |
Reimplemented from GPUStaticInst.
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inlineoverridevirtual |
Implements GPUStaticInst.
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inlineoverridevirtual |
Implements GPUStaticInst.
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inlineoverridevirtual |
Implements GPUStaticInst.
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inlineoverridevirtual |
Implements GPUStaticInst.
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inlineoverridevirtual |
Implements GPUStaticInst.
CRegOperand HsailISA::CbrInstBase< TargetType >::cond |
Definition at line 172 of file branch.hh.
Referenced by HsailISA::CbrInstBase< SRegOperand >::CbrInstBase().
TargetType HsailISA::CbrInstBase< TargetType >::target |
Definition at line 173 of file branch.hh.
Referenced by HsailISA::CbrInstBase< SRegOperand >::CbrInstBase(), HsailISA::CbrInstBase< SRegOperand >::getOperandSize(), HsailISA::CbrInstBase< SRegOperand >::getRegisterIndex(), HsailISA::CbrInstBase< SRegOperand >::getTargetPc(), HsailISA::CbrInstBase< SRegOperand >::isCondRegister(), HsailISA::CbrInstBase< SRegOperand >::isScalarRegister(), and HsailISA::CbrInstBase< SRegOperand >::isVectorRegister().
Brig::BrigWidth8_t HsailISA::CbrInstBase< TargetType >::width |
Definition at line 171 of file branch.hh.
Referenced by HsailISA::CbrInstBase< SRegOperand >::CbrInstBase().