gem5
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#include <gpu_static_inst.hh>
Public Member Functions | |
GPUStaticInst (const std::string &opcode) | |
void | instAddr (int inst_addr) |
int | instAddr () const |
int | nextInstAddr () const |
void | instNum (int num) |
int | instNum () |
void | ipdInstNum (int num) |
int | ipdInstNum () const |
virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
virtual void | generateDisassembly ()=0 |
const std::string & | disassemble () |
virtual int | getNumOperands ()=0 |
virtual bool | isCondRegister (int operandIndex)=0 |
virtual bool | isScalarRegister (int operandIndex)=0 |
virtual bool | isVectorRegister (int operandIndex)=0 |
virtual bool | isSrcOperand (int operandIndex)=0 |
virtual bool | isDstOperand (int operandIndex)=0 |
virtual int | getOperandSize (int operandIndex)=0 |
virtual int | getRegisterIndex (int operandIndex, GPUDynInstPtr gpuDynInst)=0 |
virtual int | numDstRegOperands ()=0 |
virtual int | numSrcRegOperands ()=0 |
virtual bool | isValid () const =0 |
bool | isALU () const |
bool | isBranch () const |
bool | isNop () const |
bool | isReturn () const |
bool | isUnconditionalJump () const |
bool | isSpecialOp () const |
bool | isWaitcnt () const |
bool | isBarrier () const |
bool | isMemFence () const |
bool | isMemRef () const |
bool | isFlat () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isAtomicNoRet () const |
bool | isAtomicRet () const |
bool | isScalar () const |
bool | readsSCC () const |
bool | writesSCC () const |
bool | readsVCC () const |
bool | writesVCC () const |
bool | isAtomicAnd () const |
bool | isAtomicOr () const |
bool | isAtomicXor () const |
bool | isAtomicCAS () const |
bool | isAtomicExch () const |
bool | isAtomicAdd () const |
bool | isAtomicSub () const |
bool | isAtomicInc () const |
bool | isAtomicDec () const |
bool | isAtomicMax () const |
bool | isAtomicMin () const |
bool | isArgLoad () const |
bool | isGlobalMem () const |
bool | isLocalMem () const |
bool | isArgSeg () const |
bool | isGlobalSeg () const |
bool | isGroupSeg () const |
bool | isKernArgSeg () const |
bool | isPrivateSeg () const |
bool | isReadOnlySeg () const |
bool | isSpillSeg () const |
bool | isWorkitemScope () const |
bool | isWavefrontScope () const |
bool | isWorkgroupScope () const |
bool | isDeviceScope () const |
bool | isSystemScope () const |
bool | isNoScope () const |
bool | isRelaxedOrder () const |
bool | isAcquire () const |
bool | isRelease () const |
bool | isAcquireRelease () const |
bool | isNoOrder () const |
bool | isGloballyCoherent () const |
Coherence domain of a memory instruction. More... | |
bool | isSystemCoherent () const |
virtual int | instSize () const =0 |
virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
virtual uint32_t | getTargetPc () |
void | setFlag (Flags flag) |
virtual void | execLdAcq (GPUDynInstPtr gpuDynInst) |
virtual void | execSt (GPUDynInstPtr gpuDynInst) |
virtual void | execAtomic (GPUDynInstPtr gpuDynInst) |
virtual void | execAtomicAcq (GPUDynInstPtr gpuDynInst) |
Public Attributes | |
Enums::StorageClassType | executed_as |
Static Public Attributes | |
static uint64_t | dynamic_id_count |
Protected Attributes | |
const std::string | opcode |
std::string | disassembly |
int | _instNum |
int | _instAddr |
int | _ipdInstNum |
Identifier of the immediate post-dominator instruction. More... | |
std::bitset< Num_Flags > | _flags |
Definition at line 60 of file gpu_static_inst.hh.
GPUStaticInst::GPUStaticInst | ( | const std::string & | opcode | ) |
Definition at line 38 of file gpu_static_inst.cc.
References setFlag().
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inlinevirtual |
Reimplemented in HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, and HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >.
Definition at line 210 of file gpu_static_inst.hh.
References fatal.
Referenced by GPUDynInst::completeAcc().
const std::string & GPUStaticInst::disassemble | ( | ) |
Definition at line 46 of file gpu_static_inst.cc.
References disassembly, and generateDisassembly().
Referenced by GPUDynInst::disassemble(), HsailISA::Call::MagicPrintLane(), HsailISA::Call::MagicPrintLane64(), HsailISA::Call::MagicPrintWF32(), HsailISA::Call::MagicPrintWF32ID(), HsailISA::Call::MagicPrintWF64(), HsailISA::Call::MagicPrintWFFloat(), HsailISA::Call::MagicPrintWFID64(), and FetchUnit::processFetchReturn().
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inlinevirtual |
Reimplemented in HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >.
Definition at line 237 of file gpu_static_inst.hh.
References fatal.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::initiateAcc().
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inlinevirtual |
Reimplemented in HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >.
Definition at line 243 of file gpu_static_inst.hh.
References fatal.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic().
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inlinevirtual |
Reimplemented in HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >.
Definition at line 225 of file gpu_static_inst.hh.
References fatal.
Referenced by HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::initiateAcc().
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inlinevirtual |
Reimplemented in HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >.
Definition at line 231 of file gpu_static_inst.hh.
References fatal.
Referenced by HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::initiateAcc().
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pure virtual |
Implemented in HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::MemFence, HsailISA::Barrier, HsailISA::Ret, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, KernelLaunchStaticInst, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::LdaInst< DestDataType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::execute().
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pure virtual |
Implemented in HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::Stub, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, KernelLaunchStaticInst, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, HsailISA::LdaInst< DestDataType, AddrOperandType >, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::HsailGPUStaticInst, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by disassemble().
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pure virtual |
Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, KernelLaunchStaticInst, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::getNumOperands().
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pure virtual |
Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, KernelLaunchStaticInst, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::getOperandSize().
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pure virtual |
Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, KernelLaunchStaticInst, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::getRegisterIndex().
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inlinevirtual |
Reimplemented in HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Definition at line 215 of file gpu_static_inst.hh.
Referenced by ControlFlowInfo::connectBasicBlocks().
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inlinevirtual |
Reimplemented in HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::MemFence, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, and HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >.
Definition at line 203 of file gpu_static_inst.hh.
References fatal.
Referenced by GPUDynInst::initiateAcc().
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inline |
Definition at line 64 of file gpu_static_inst.hh.
References _instAddr.
Referenced by ControlFlowInfo::basicBlock(), ControlFlowInfo::findImmediatePostDominators(), and HsailCode::init().
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inline |
Definition at line 65 of file gpu_static_inst.hh.
References _instAddr.
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Definition at line 68 of file gpu_static_inst.hh.
References _instNum.
Referenced by HsailCode::init(), and ControlFlowInfo::lastInstruction().
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Definition at line 70 of file gpu_static_inst.hh.
References _instNum.
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pure virtual |
Implemented in KernelLaunchStaticInst, and HsailISA::HsailGPUStaticInst.
Referenced by nextInstAddr(), and FetchUnit::processFetchReturn().
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inline |
Definition at line 72 of file gpu_static_inst.hh.
References _ipdInstNum.
Referenced by ControlFlowInfo::findImmediatePostDominators().
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inline |
Definition at line 74 of file gpu_static_inst.hh.
References _ipdInstNum.
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inline |
Definition at line 179 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isAcquire().
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inline |
Definition at line 181 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isAcquireRelease().
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inline |
Definition at line 95 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isALU().
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Definition at line 144 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isArgLoad().
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Definition at line 163 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isArgSeg().
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Definition at line 117 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isAtomic().
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inline |
Definition at line 136 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicAdd().
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inline |
Definition at line 131 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicAnd().
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inline |
Definition at line 134 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicCAS().
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inline |
Definition at line 139 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicDec().
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inline |
Definition at line 135 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicExch().
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inline |
Definition at line 138 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicInc().
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inline |
Definition at line 140 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicMax().
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inline |
Definition at line 141 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicMin().
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Definition at line 122 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isAtomicNoRet().
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Definition at line 132 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicOr().
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Definition at line 123 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::completeAcc(), and GPUDynInst::isAtomicRet().
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inline |
Definition at line 137 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicSub().
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Definition at line 133 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), and GPUDynInst::isAtomicXor().
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inline |
Definition at line 109 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isBarrier().
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inline |
Definition at line 96 of file gpu_static_inst.hh.
References _flags.
Referenced by ControlFlowInfo::connectBasicBlocks(), and GPUDynInst::isBranch().
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pure virtual |
Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, KernelLaunchStaticInst, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::isCondRegister().
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inline |
Definition at line 174 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isDeviceScope().
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pure virtual |
Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, KernelLaunchStaticInst, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::isDstOperand().
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Definition at line 112 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isFlat().
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Coherence domain of a memory instruction.
Only valid for machine ISA. The coherence domain specifies where it is possible to perform memory synchronization, e.g., acquire or release, from the shader kernel.
isGloballyCoherent(): returns true if kernel is sharing memory with other work-items on the same device (GPU)
isSystemCoherent(): returns true if kernel is sharing memory with other work-items on a different device (GPU) or the host (CPU)
Definition at line 196 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isGloballyCoherent().
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Definition at line 150 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::completeAcc(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::completeAcc(), and GPUDynInst::isGlobalMem().
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Definition at line 164 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::MemFence::execute(), and GPUDynInst::isGlobalSeg().
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Definition at line 165 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::MemFence::execute(), and GPUDynInst::isGroupSeg().
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Definition at line 166 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isKernArgSeg().
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Definition at line 113 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isLoad().
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Definition at line 158 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::completeAcc(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::completeAcc(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomicAcq(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::execLdAcq(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execSt(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::initiateAcc(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::initiateAcc(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::initiateAcc(), GPUDynInst::isLocalMem(), and GPUDynInst::updateStats().
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Definition at line 110 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isMemFence().
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Definition at line 111 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isMemRef().
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Definition at line 182 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isNoOrder().
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Definition at line 97 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isNop().
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Definition at line 176 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isNoScope().
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Definition at line 167 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isPrivateSeg().
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Definition at line 168 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isReadOnlySeg().
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Definition at line 178 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isRelaxedOrder().
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Definition at line 180 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isRelease().
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Definition at line 98 of file gpu_static_inst.hh.
References _flags.
Referenced by ControlFlowInfo::connectBasicBlocks(), and GPUDynInst::isReturn().
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Definition at line 125 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isScalar().
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Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, KernelLaunchStaticInst, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::isScalarRegister().
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Definition at line 106 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isSpecialOp().
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Definition at line 169 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isSpillSeg().
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Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, KernelLaunchStaticInst, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::isSrcOperand().
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Definition at line 114 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isStore().
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Definition at line 197 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isSystemCoherent().
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Definition at line 175 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isSystemScope().
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Definition at line 101 of file gpu_static_inst.hh.
References _flags.
Referenced by ControlFlowInfo::connectBasicBlocks(), and GPUDynInst::isUnconditionalJump().
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pure virtual |
Implemented in KernelLaunchStaticInst, and HsailISA::HsailGPUStaticInst.
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pure virtual |
Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::BrInstBase< TargetType >, HsailISA::BrInstBase< LabelOperand >, HsailISA::BrInstBase< SRegOperand >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, KernelLaunchStaticInst, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, HsailISA::CbrInstBase< TargetType >, HsailISA::CbrInstBase< LabelOperand >, HsailISA::CbrInstBase< SRegOperand >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >, HsailISA::BrnInstBase< TargetType >, HsailISA::BrnInstBase< LabelOperand >, and HsailISA::BrnInstBase< SRegOperand >.
Referenced by GPUDynInst::isVectorRegister().
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inline |
Definition at line 107 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isWaitcnt().
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Definition at line 172 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isWavefrontScope().
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Definition at line 173 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isWorkgroupScope().
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Definition at line 171 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::isWorkitemScope().
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inline |
Definition at line 66 of file gpu_static_inst.hh.
References _instAddr, and instSize().
Referenced by ControlFlowInfo::connectBasicBlocks().
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pure virtual |
Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::BrIndirectInst, HsailISA::BrDirectInst, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, HsailISA::CbrIndirectInst, HsailISA::CbrDirectInst, KernelLaunchStaticInst, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::BrnIndirectInst, HsailISA::BrnDirectInst, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, and HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >.
Referenced by GPUDynInst::numDstRegOperands().
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Implemented in HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >, HsailISA::Call, HsailISA::SpecialInst1SrcBase< DestOperandType >, HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >, HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >, HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >, HsailISA::SpecialInstNoSrcBase< DestOperandType >, HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >, HsailISA::SpecialInstNoSrcNoDest, HsailISA::Stub, HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType >, HsailISA::TwoNonUniformSourceInstBase< B1::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType >, HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >, HsailISA::BrIndirectInst, HsailISA::BrDirectInst, HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType >, HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, DataType::OperandType, U32::OperandType, U32::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType, Src2DataType::OperandType >, HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >, HsailISA::CbrIndirectInst, HsailISA::CbrDirectInst, KernelLaunchStaticInst, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 2 >, HsailISA::CommonInstBase< DestOperandType, SrcOperandType, 2 >, HsailISA::CommonInstBase< DataType::OperandType, DataType::OperandType, NumSrcOperands >, HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >, HsailISA::BrnIndirectInst, HsailISA::BrnDirectInst, HsailISA::LdaInstBase< DestOperandType, AddrOperandType >, and HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >.
Referenced by GPUDynInst::numSrcRegOperands().
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Definition at line 126 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::readsSCC().
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Definition at line 128 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::readsVCC().
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Definition at line 222 of file gpu_static_inst.hh.
References _flags.
Referenced by HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >::AtomicInstBase(), HsailISA::Barrier::Barrier(), HsailISA::BrInstBase< SRegOperand >::BrInstBase(), HsailISA::BrnInstBase< SRegOperand >::BrnInstBase(), HsailISA::Call::Call(), HsailISA::CbrInstBase< SRegOperand >::CbrInstBase(), HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >::CommonInstBase(), HsailISA::Ret::execute(), GPUStaticInst(), KernelLaunchStaticInst::KernelLaunchStaticInst(), HsailISA::LdaInstBase< DestDataType::OperandType, AddrOperandType >::LdaInstBase(), HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >::LdInstBase(), HsailISA::Call::MagicAtomicNRAddGlobalU32Reg(), HsailISA::Call::MagicAtomicNRAddGroupU32Reg(), HsailISA::Call::MagicLoadGlobalU32Reg(), HsailISA::MemFence::MemFence(), HsailISA::Ret::Ret(), HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >::SpecialInst1SrcBase(), HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >::StInstBase(), HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >::ThreeNonUniformSourceInstBase(), and HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >::TwoNonUniformSourceInstBase().
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Definition at line 127 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::writesSCC().
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Definition at line 129 of file gpu_static_inst.hh.
References _flags.
Referenced by GPUDynInst::writesVCC().
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Definition at line 258 of file gpu_static_inst.hh.
Referenced by isAcquire(), isAcquireRelease(), isALU(), isArgLoad(), isArgSeg(), isAtomic(), isAtomicAdd(), isAtomicAnd(), isAtomicCAS(), isAtomicDec(), isAtomicExch(), isAtomicInc(), isAtomicMax(), isAtomicMin(), isAtomicNoRet(), isAtomicOr(), isAtomicRet(), isAtomicSub(), isAtomicXor(), isBarrier(), isBranch(), isDeviceScope(), isFlat(), isGloballyCoherent(), isGlobalMem(), isGlobalSeg(), isGroupSeg(), isKernArgSeg(), isLoad(), isLocalMem(), isMemFence(), isMemRef(), isNoOrder(), isNop(), isNoScope(), isPrivateSeg(), isReadOnlySeg(), isRelaxedOrder(), isRelease(), isReturn(), isScalar(), isSpecialOp(), isSpillSeg(), isStore(), isSystemCoherent(), isSystemScope(), isUnconditionalJump(), isWaitcnt(), isWavefrontScope(), isWorkgroupScope(), isWorkitemScope(), readsSCC(), readsVCC(), setFlag(), writesSCC(), and writesVCC().
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Definition at line 252 of file gpu_static_inst.hh.
Referenced by instAddr(), and nextInstAddr().
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Definition at line 251 of file gpu_static_inst.hh.
Referenced by instNum().
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Identifier of the immediate post-dominator instruction.
Definition at line 256 of file gpu_static_inst.hh.
Referenced by ipdInstNum().
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Definition at line 250 of file gpu_static_inst.hh.
Referenced by disassemble(), HsailISA::HsailGPUStaticInst::generateDisassembly(), HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >::generateDisassembly(), HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >::generateDisassembly(), KernelLaunchStaticInst::generateDisassembly(), HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >::generateDisassembly(), HsailISA::Stub::generateDisassembly(), HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >::generateDisassembly(), HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >::generateDisassembly(), and HsailISA::Call::generateDisassembly().
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Definition at line 217 of file gpu_static_inst.hh.
Enums::StorageClassType GPUStaticInst::executed_as |
Definition at line 220 of file gpu_static_inst.hh.
Referenced by GPUDynInst::executedAs().
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Definition at line 249 of file gpu_static_inst.hh.
Referenced by HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >::AtomicInstBase(), HsailISA::HsailGPUStaticInst::generateDisassembly(), HsailISA::CommonInstBase< DestDataType::OperandType, SrcDataType::OperandType, 1 >::generateDisassembly(), HsailISA::ThreeNonUniformSourceInstBase< DataType::OperandType, B1::OperandType, DataType::OperandType, DataType::OperandType >::generateDisassembly(), KernelLaunchStaticInst::generateDisassembly(), HsailISA::TwoNonUniformSourceInstBase< DestDataType::OperandType, Src0DataType::OperandType, Src1DataType::OperandType >::generateDisassembly(), HsailISA::Stub::generateDisassembly(), HsailISA::SpecialInstNoSrcBase< DestDataType::OperandType >::generateDisassembly(), HsailISA::SpecialInst1SrcBase< DestDataType::OperandType >::generateDisassembly(), and HsailISA::Call::generateDisassembly().