#include "base/trace.hh"
#include <cctype>
#include <fstream>
#include <iostream>
#include <sstream>
#include <string>
#include "base/debug.hh"
#include "base/misc.hh"
#include "base/output.hh"
#include "base/str.hh"
Go to the source code of this file.
const std::string& name |
( |
| ) |
|
Definition at line 49 of file trace.cc.
Referenced by TraceCPU::checkAndSchedExitEvent(), OutputDirectory::createSubdirectory(), AddrOperandBase::disassemble(), Event::dump(), ArmKvmCPU::dumpKvmStateCoProc(), FullO3CPU< Impl >::FullO3CPU(), StubSlavePortHandler::getExternalPort(), BrigObject::getFunction(), gethostnameFunc(), MSHR::handleSnoop(), CheckerCPU::init(), TraceCPU::init(), BaseRegOperand::initWithStrOffset(), OutputDirectory::open(), AddrOperandBase::parseAddr(), BrigObject::processDirectives(), ThreadContext::quiesce(), LabelMap::refLabel(), BaseKvmCPU::regStats(), LSQUnit< Impl >::regStats(), MemDepUnit< MemDepPred, Impl >::regStats(), DefaultDecode< Impl >::regStats(), Ticked::regStats(), InstructionQueue< Impl >::regStats(), MinorCPU::regStats(), BaseSimpleCPU::regStats(), DefaultIEW< Impl >::regStats(), DefaultRename< Impl >::regStats(), DefaultCommit< Impl >::regStats(), DefaultFetch< Impl >::regStats(), FullO3CPU< Impl >::regStats(), ROB< Impl >::regStats(), TraceCPU::regStats(), OutputDirectory::resolve(), CxxConfigManager::SimObjectResolver::resolveSimObject(), TimerTable::setDescription(), SparcISA::unameFunc(), unameFunc(), unameFunc32(), unameFunc64(), Event::unserialize(), and TraceCPU::updateNumOps().