gem5
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#include <array>
#include <cstdint>
#include <queue>
#include <set>
#include <unordered_map>
#include "arch/registers.hh"
#include "base/statistics.hh"
#include "cpu/base.hh"
#include "debug/TraceCPUData.hh"
#include "debug/TraceCPUInst.hh"
#include "params/TraceCPU.hh"
#include "proto/inst_dep_record.pb.h"
#include "proto/packet.pb.h"
#include "proto/protoio.hh"
#include "sim/sim_events.hh"
Go to the source code of this file.
Classes | |
class | TraceCPU |
The trace cpu replays traces generated using the elastic trace probe attached to the O3 CPU model. More... | |
class | TraceCPU::IcachePort |
IcachePort class that interfaces with L1 Instruction Cache. More... | |
class | TraceCPU::DcachePort |
DcachePort class that interfaces with L1 Data Cache. More... | |
class | TraceCPU::FixedRetryGen |
Generator to read protobuf trace containing memory requests at fixed timestamps, perform flow control and issue memory requests. More... | |
struct | TraceCPU::FixedRetryGen::TraceElement |
This struct stores a line in the trace file. More... | |
class | TraceCPU::FixedRetryGen::InputStream |
The InputStream encapsulates a trace file and the internal buffers and populates TraceElements based on the input. More... | |
class | TraceCPU::ElasticDataGen |
The elastic data memory request generator to read protobuf trace containing execution trace annotated with data and ordering dependencies. More... | |
class | TraceCPU::ElasticDataGen::GraphNode |
The struct GraphNode stores an instruction in the trace file. More... | |
struct | TraceCPU::ElasticDataGen::ReadyNode |
Struct to store a ready-to-execute node and its execution tick. More... | |
class | TraceCPU::ElasticDataGen::HardwareResource |
The HardwareResource class models structures that hold the in-flight nodes. More... | |
class | TraceCPU::ElasticDataGen::InputStream |
The InputStream encapsulates a trace file and the internal buffers and populates GraphNodes based on the input. More... | |