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arch
x86
pagetable.cc
Go to the documentation of this file.
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/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "
arch/x86/pagetable.hh
"
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#include <cmath>
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#include "
arch/x86/isa_traits.hh
"
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#include "
sim/serialize.hh
"
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namespace
X86ISA
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{
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TlbEntry::TlbEntry
()
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: paddr(0),
vaddr
(0),
logBytes
(0),
writable
(0),
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user
(true),
uncacheable
(0),
global
(false),
patBit
(0),
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noExec
(false),
lruSeq
(0)
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{
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}
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TlbEntry::TlbEntry
(
Addr
asn,
Addr
_vaddr,
Addr
_paddr,
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bool
uncacheable
,
bool
read_only) :
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paddr(_paddr),
vaddr
(_vaddr),
logBytes
(
PageShift
),
writable
(!read_only),
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user
(true), uncacheable(uncacheable),
global
(false),
patBit
(0),
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noExec
(false),
lruSeq
(0)
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{}
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void
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TlbEntry::serialize
(
CheckpointOut
&cp)
const
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{
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SERIALIZE_SCALAR
(paddr);
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SERIALIZE_SCALAR
(
vaddr
);
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SERIALIZE_SCALAR
(
logBytes
);
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SERIALIZE_SCALAR
(
writable
);
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SERIALIZE_SCALAR
(
user
);
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SERIALIZE_SCALAR
(
uncacheable
);
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SERIALIZE_SCALAR
(
global
);
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SERIALIZE_SCALAR
(
patBit
);
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SERIALIZE_SCALAR
(
noExec
);
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SERIALIZE_SCALAR
(
lruSeq
);
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}
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void
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TlbEntry::unserialize
(
CheckpointIn
&cp)
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{
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UNSERIALIZE_SCALAR
(paddr);
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UNSERIALIZE_SCALAR
(
vaddr
);
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UNSERIALIZE_SCALAR
(
logBytes
);
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UNSERIALIZE_SCALAR
(
writable
);
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UNSERIALIZE_SCALAR
(
user
);
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UNSERIALIZE_SCALAR
(
uncacheable
);
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UNSERIALIZE_SCALAR
(
global
);
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UNSERIALIZE_SCALAR
(
patBit
);
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UNSERIALIZE_SCALAR
(
noExec
);
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UNSERIALIZE_SCALAR
(
lruSeq
);
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}
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}
X86ISA::logBytes
unsigned logBytes
Definition:
pagetable.hh:107
SparcISA::PageShift
const Addr PageShift
Definition:
isa_traits.hh:58
SparcISA::TlbEntry::unserialize
void unserialize(CheckpointIn &cp)
Definition:
pagetable.cc:56
X86ISA::uncacheable
bool uncacheable
Definition:
pagetable.hh:118
X86ISA::global
bool global
Definition:
pagetable.hh:120
pagetable.hh
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition:
serialize.hh:145
X86ISA::lruSeq
uint64_t lruSeq
Definition:
pagetable.hh:126
isa_traits.hh
SparcISA::TlbEntry::serialize
void serialize(CheckpointOut &cp) const
Definition:
pagetable.cc:39
X86ISA::patBit
bool patBit
Definition:
pagetable.hh:122
MipsISA::vaddr
vaddr
Definition:
pra_constants.hh:277
X86ISA::TlbEntry
TlbEntry(Addr asn, Addr _vaddr, Addr _paddr, bool uncacheable, bool read_only)
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
CheckpointIn
Definition:
serialize.hh:340
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition:
serialize.hh:143
serialize.hh
CheckpointOut
std::ostream CheckpointOut
Definition:
serialize.hh:67
X86ISA::vaddr
EndBitUnion(PageTableEntry) struct TlbEntry Addr vaddr
Definition:
pagetable.hh:96
AlphaISA::Kernel::user
Definition:
kernel_stats.hh:52
X86ISA::noExec
bool noExec
Definition:
pagetable.hh:124
SparcISA::TlbEntry::TlbEntry
TlbEntry()
Definition:
pagetable.hh:230
X86ISA::user
bool user
Definition:
pagetable.hh:113
X86ISA::writable
bool writable
Definition:
pagetable.hh:111
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