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gem5
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#include "arch/x86/process.hh"#include <string>#include <vector>#include "arch/x86/isa_traits.hh"#include "arch/x86/regs/misc.hh"#include "arch/x86/regs/segment.hh"#include "arch/x86/system.hh"#include "arch/x86/types.hh"#include "base/loader/elf_object.hh"#include "base/loader/object_file.hh"#include "base/misc.hh"#include "base/trace.hh"#include "cpu/thread_context.hh"#include "debug/Stack.hh"#include "mem/multi_level_page_table.hh"#include "mem/page_table.hh"#include "sim/aux_vector.hh"#include "sim/process_impl.hh"#include "sim/syscall_desc.hh"#include "sim/syscall_return.hh"#include "sim/system.hh"Go to the source code of this file.
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| static const int | ArgumentReg [] |
| static const int NumArgumentRegs | M5_VAR_USED |
| static const int | ArgumentReg32 [] |
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Definition at line 72 of file process.cc.
Referenced by X86ISA::X86_64Process::getSyscallArg(), X86ISA::I386Process::getSyscallArg(), X86ISA::X86_64Process::setSyscallArg(), and X86ISA::I386Process::setSyscallArg().
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Definition at line 86 of file process.cc.
Referenced by X86ISA::I386Process::getSyscallArg().
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Definition at line 83 of file process.cc.
Referenced by System::addFuncEvent(), ArmISA::ISA::assert32(), ArmISA::ISA::assert64(), ArmISA::TLB::checkPermissions64(), VncServer::checkProtocolVersion(), cloneFunc(), SyscallDesc::doSyscall(), BPredUnit::drainSanityCheck(), DRAMSim2Wrapper::enqueue(), HsailISA::LdaInst< DestDataType, AddrOperandType >::execute(), HsailISA::CbrInstBase< TargetType >::execute(), Minor::LSQ::SplitDataRequest::finish(), RubySystem::functionalWrite(), RubyPort::PioSlavePort::getAddrRanges(), MipsISA::Interrupts::getInterrupt(), Cache::handleSnoop(), GarnetNetwork::init(), GPUCoalescer::insertRequest(), ArmISA::ArmFault::invoke(), ArmISA::AbortFault< T >::invoke(), Minor::LSQ::SplitDataRequest::makeFragmentRequests(), Minor::Fetch1::minorTraceResponseLine(), Linux::openSpecialFile(), RoutingUnit::outportComputeXY(), TraceCPU::ElasticDataGen::printReadyList(), SkipFuncEvent::process(), ComputeUnit::DataPort::MemReqEvent::process(), BrigObject::processDirectives(), PciVirtIO::read(), Sinic::Device::read(), Wavefront::ready(), CacheMemory::recordCacheContents(), StubSlavePort::recvAtomic(), RubyPort::MemSlavePort::recvFunctional(), ComputeUnit::DataPort::recvReqRetry(), ComputeUnit::SQCPort::recvReqRetry(), ComputeUnit::DTLBPort::recvReqRetry(), ComputeUnit::ITLBPort::recvReqRetry(), Cache::CpuSidePort::recvTimingReq(), RubyPort::PioSlavePort::recvTimingReq(), Cache::recvTimingReq(), ComputeUnit::DTLBPort::recvTimingResp(), ComputeUnit::ITLBPort::recvTimingResp(), CoherentXBar::recvTimingSnoopResp(), TraceCPU::ElasticDataGen::GraphNode::removeDepOnInst(), Cache::sendMSHRQueuePacket(), ComputeUnit::LDSPort::sendTimingReq(), ComputeUnit::startWavefront(), TimingSimpleCPU::switchOut(), System::System(), MemTest::tick(), ElfObject::tryFile(), ArmISA::VldSingleOp::VldSingleOp(), ArmISA::VstSingleOp::VstSingleOp(), PciVirtIO::write(), CopyEngine::write(), Pl390::writeDistributor(), and TCPIface::~TCPIface().