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gem5
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gem5
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#include <faults.hh>
Public Member Functions | |
| FastInstructionAccessMMUMiss (Addr addr) | |
| FastInstructionAccessMMUMiss () | |
| void | invoke (ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) |
 Public Member Functions inherited from SparcISA::SparcFault< FastInstructionAccessMMUMiss > | |
| FaultName | name () const |
| TrapType | trapType () |
| FaultPriority | priority () |
| FaultStat & | countStat () |
| PrivilegeLevel | getNextLevel (PrivilegeLevel current) |
Protected Attributes | |
| Addr | vaddr |
Additional Inherited Members | |
| Public Types inherited from SparcISA::SparcFaultBase | |
| enum | PrivilegeLevel { U, User = U, P, Privileged = P, H, Hyperprivileged = H, NumLevels, SH = -1, ShouldntHappen = SH } |
| Static Protected Attributes inherited from SparcISA::SparcFault< FastInstructionAccessMMUMiss > | |
| static FaultVals | vals |
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inline |
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inline |
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virtual |
Reimplemented from SparcISA::SparcFaultBase.
Definition at line 617 of file faults.cc.
References bits(), FullSystem, ThreadContext::getITBPtr(), ThreadContext::getProcessPtr(), PageTableBase::lookup(), SparcISA::MISCREG_TLB_DATA, MipsISA::p, PageTableBase::pageAlign(), panic, Process::pTable, SparcISA::TlbEntry::pte, ThreadContext::readMiscRegNoEffect(), and MipsISA::vaddr.
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protected |