TimingSimpleCPU::TimingCPUPort Member List

This is the complete list of members for TimingSimpleCPU::TimingCPUPort, including all inherited members.

_baseSlavePort	BaseMasterPort	protected
BaseMasterPort(const std::string &name, MemObject *owner, PortID id=InvalidPortID)	BaseMasterPort	protected
bind(BaseSlavePort &slave_port)	MasterPort	virtual
cpu	TimingSimpleCPU::TimingCPUPort	protected
getAddrRanges() const	MasterPort
getId() const	Port	inline
getSlavePort() const	BaseMasterPort
id	Port	protected
isConnected() const	BaseMasterPort
isSnooping() const	MasterPort	inlinevirtual
MasterPort(const std::string &name, MemObject *owner, PortID id=InvalidPortID)	MasterPort
name() const	Port	inline
owner	Port	protected
Port(const std::string &_name, MemObject &_owner, PortID _id)	Port	protected
printAddr(Addr a)	MasterPort
recvAtomicSnoop(PacketPtr pkt)	MasterPort	inlineprotectedvirtual
recvFunctionalSnoop(PacketPtr pkt)	MasterPort	inlineprotectedvirtual
recvRangeChange()	MasterPort	inlineprotectedvirtual
recvReqRetry()=0	MasterPort	protectedpure virtual
recvRetrySnoopResp()	MasterPort	inlineprotectedvirtual
recvTimingResp(PacketPtr pkt)=0	MasterPort	protectedpure virtual
recvTimingSnoopReq(PacketPtr pkt)	MasterPort	inlineprotectedvirtual
retryRespEvent	TimingSimpleCPU::TimingCPUPort	protected
sendAtomic(PacketPtr pkt)	MasterPort
sendFunctional(PacketPtr pkt)	MasterPort
sendRetryResp()	MasterPort	virtual
sendTimingReq(PacketPtr pkt)	MasterPort
sendTimingSnoopResp(PacketPtr pkt)	MasterPort
TimingCPUPort(const std::string &_name, TimingSimpleCPU *_cpu)	TimingSimpleCPU::TimingCPUPort	inline
unbind()	MasterPort	virtual
~BaseMasterPort()	BaseMasterPort	protectedvirtual
~MasterPort()	MasterPort	virtual
~Port()	Port	protectedvirtual