43 #ifndef __CPU_O3_MEM_DEP_UNIT_HH__
44 #define __CPU_O3_MEM_DEP_UNIT_HH__
49 #include <unordered_map>
53 #include "debug/MemDepUnit.hh"
57 unsigned a = (unsigned)seq_num;
58 unsigned hash = (((a >> 14) ^ ((a >> 2) & 0xffff))) & 0x7FFFFFFF;
64 struct DerivO3CPUParams;
80 template <
class MemDepPred,
class Impl>
187 "memdep_count=%i %s\n", memdep_count,
inst->pcState());
201 "memdep_count=%i %s\n", memdep_count,
inst->pcState());
206 std::string
name()
const {
return "memdepentry"; }
228 static int memdep_count;
229 static int memdep_insert;
230 static int memdep_erase;
240 typedef std::unordered_map<InstSeqNum, MemDepEntryPtr, SNHash>
MemDepHash;
285 #endif // __CPU_O3_MEM_DEP_UNIT_HH__
MemDepHash memDepHash
A hash map of all memory dependence entries.
bool loadBarrier
Is there an outstanding load barrier that loads must wait on.
std::shared_ptr< MemDepEntry > MemDepEntryPtr
InstSeqNum storeBarrierSN
The sequence number of the store barrier.
void violation(DynInstPtr &store_inst, DynInstPtr &violating_load)
Indicates an ordering violation between a store and a younger load.
std::list< DynInstPtr >::iterator ListIt
ListIt listIt
The iterator to the instruction's location inside the list.
void regStats()
Registers statistics.
void replay()
Replays all instructions that have been rescheduled by moving them to the ready list.
bool storeBarrier
Is there an outstanding store barrier that loads must wait on.
bool memDepReady
If all memory dependencies have been satisfied.
~MemDepEntry()
Frees any pointers.
int id
The thread id of this memory dependence unit.
void setIQ(InstructionQueue< Impl > *iq_ptr)
Sets the pointer to the IQ.
std::vector< MemDepEntryPtr > dependInsts
A vector of any dependent instructions.
Declaration of Statistics objects.
This is a simple scalar statistic, like a counter.
void wakeDependents(DynInstPtr &inst)
Wakes any dependents of a memory instruction.
~MemDepUnit()
Frees up any memory allocated.
void completed(DynInstPtr &inst)
Completes a memory instruction.
Stats::Scalar insertedLoads
Stat for number of inserted loads.
bool squashed
If the instruction is squashed.
InstructionQueue< Impl > * iqPtr
Pointer to the IQ.
void takeOverFrom()
Takes over from another CPU's thread.
Impl::DynInstPtr DynInstPtr
void nonSpecInstReady(DynInstPtr &inst)
Indicate that a non-speculative instruction is ready.
bool regsReady
If the registers are ready or not.
Stats::Scalar conflictingStores
Stat for number of conflicting stores that had to wait for a store.
size_t operator()(const InstSeqNum &seq_num) const
void insert(DynInstPtr &inst)
Inserts a memory instruction.
Stats::Scalar conflictingLoads
Stat for number of conflicting loads that had to wait for a store.
void moveToReady(MemDepEntryPtr &ready_inst_entry)
Moves an entry to the ready list.
bool completed
If the instruction is completed.
Memory dependence entries that track memory operations, marking when the instruction is ready to exec...
void dumpLists()
Debugging function to dump the lists of instructions.
MemDepEntryPtr & findInHash(const DynInstPtr &inst)
Finds the memory dependence entry in the hash map.
void regsReady(DynInstPtr &inst)
Indicate that an instruction has its registers ready.
void insertNonSpec(DynInstPtr &inst)
Inserts a non-speculative memory instruction.
Stats::Scalar insertedStores
Stat for number of inserted stores.
std::list< DynInstPtr > instList[Impl::MaxThreads]
A list of all instructions in the memory dependence unit.
MemDepPred depPred
The memory dependence predictor.
Memory dependency unit class.
MemDepEntry(DynInstPtr &new_inst)
Constructs a memory dependence entry.
int16_t ThreadID
Thread index/ID type.
void init(DerivO3CPUParams *params, ThreadID tid)
Initializes the unit with parameters and a thread id.
void insertBarrier(DynInstPtr &barr_inst)
Inserts a barrier instruction.
void issue(DynInstPtr &inst)
Issues the given instruction.
std::string name() const
Returns the name of the memory dependence unit.
InstSeqNum loadBarrierSN
The sequence number of the load barrier.
std::string name() const
Returns the name of the memory dependence entry.
void squash(const InstSeqNum &squashed_num, ThreadID tid)
Squashes all instructions up until a given sequence number for a specific thread. ...
std::list< DynInstPtr > instsToReplay
A list of all instructions that are going to be replayed.
void drainSanityCheck() const
Perform sanity checks after a drain.
std::unordered_map< InstSeqNum, MemDepEntryPtr, SNHash > MemDepHash
void reschedule(DynInstPtr &inst)
Reschedules an instruction to be re-executed.
bool isDrained() const
Determine if we are drained.
void completeBarrier(DynInstPtr &inst)
Completes a barrier instruction.
MemDepUnit()
Empty constructor.
A standard instruction queue class.
DynInstPtr inst
The instruction being tracked.
MemDepHash::iterator MemDepHashIt