gem5
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#include <faults.hh>
Public Member Functions | |
PrefetchAbort (Addr _addr, uint8_t _source, bool _stage2=false, ArmFault::TranMethod _tranMethod=ArmFault::UnknownTran) | |
ExceptionClass | ec (ThreadContext *tc) const |
bool | routeToMonitor (ThreadContext *tc) const |
bool | routeToHyp (ThreadContext *tc) const |
Public Member Functions inherited from ArmISA::AbortFault< PrefetchAbort > | |
AbortFault (Addr _faultAddr, bool _write, TlbEntry::DomainType _domain, uint8_t _source, bool _stage2, ArmFault::TranMethod _tranMethod=ArmFault::UnknownTran) | |
void | invoke (ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) |
FSR | getFsr (ThreadContext *tc) |
bool | abortDisable (ThreadContext *tc) |
uint32_t | iss () const |
bool | isStage2 () const |
void | annotate (ArmFault::AnnotationIDs id, uint64_t val) |
bool | isMMUFault () const |
Public Member Functions inherited from ArmISA::ArmFaultVals< PrefetchAbort > | |
ArmFaultVals (ExtMachInst _machInst=0, uint32_t _iss=0) | |
FaultName | name () const |
FaultStat & | countStat () |
FaultOffset | offset (ThreadContext *tc) |
FaultOffset | offset64 () |
OperatingMode | nextMode () |
uint8_t | armPcOffset (bool isHyp) |
uint8_t | thumbPcOffset (bool isHyp) |
uint8_t | armPcElrOffset () |
uint8_t | thumbPcElrOffset () |
virtual bool | fiqDisable (ThreadContext *tc) |
Public Member Functions inherited from ArmISA::ArmFault | |
ArmFault (ExtMachInst _machInst=0, uint32_t _iss=0) | |
MiscRegIndex | getSyndromeReg64 () const |
MiscRegIndex | getFaultAddrReg64 () const |
void | invoke64 (ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) |
virtual void | setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg) |
Static Public Attributes | |
static const MiscRegIndex | FsrIndex = MISCREG_IFSR |
static const MiscRegIndex | FarIndex = MISCREG_IFAR |
static const MiscRegIndex | HFarIndex = MISCREG_HIFAR |
Static Public Attributes inherited from ArmISA::ArmFault | |
static uint8_t | shortDescFaultSources [NumFaultSources] |
Encodings of the fault sources when the short-desc. More... | |
static uint8_t | longDescFaultSources [NumFaultSources] |
Encodings of the fault sources when the long-desc. More... | |
static uint8_t | aarch64FaultSources [NumFaultSources] |
Encodings of the fault sources in AArch64 state. More... | |
Additional Inherited Members | |
Public Types inherited from ArmISA::ArmFault | |
enum | FaultSource { AlignmentFault = 0, InstructionCacheMaintenance, SynchExtAbtOnTranslTableWalkLL, SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4, TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4, AccessFlagLL = TranslationLL + 4, DomainLL = AccessFlagLL + 4, PermissionLL = DomainLL + 4, DebugEvent = PermissionLL + 4, SynchronousExternalAbort, TLBConflictAbort, SynchPtyErrOnMemoryAccess, AsynchronousExternalAbort, AsynchPtyErrOnMemoryAccess, AddressSizeLL, PrefetchTLBMiss = AddressSizeLL + 4, PrefetchUncacheable, NumFaultSources, FaultSourceInvalid = 0xff } |
Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More... | |
enum | AnnotationIDs { S1PTW, OVA, SAS, SSE, SRT, SF, AR } |
enum | TranMethod { LpaeTran, VmsaTran, UnknownTran } |
Protected Member Functions inherited from ArmISA::ArmFault | |
Addr | getVector (ThreadContext *tc) |
Addr | getVector64 (ThreadContext *tc) |
Protected Attributes inherited from ArmISA::AbortFault< PrefetchAbort > | |
Addr | faultAddr |
The virtual address the fault occured at. More... | |
Addr | OVAddr |
Original virtual address. More... | |
bool | write |
TlbEntry::DomainType | domain |
uint8_t | source |
uint8_t | srcEncoded |
bool | stage2 |
bool | s1ptw |
ArmFault::TranMethod | tranMethod |
Protected Attributes inherited from ArmISA::ArmFault | |
ExtMachInst | machInst |
uint32_t | issRaw |
bool | from64 |
bool | to64 |
ExceptionLevel | fromEL |
ExceptionLevel | toEL |
OperatingMode | fromMode |
Static Protected Attributes inherited from ArmISA::ArmFaultVals< PrefetchAbort > | |
static FaultVals | vals |
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Reimplemented from ArmISA::ArmFaultVals< PrefetchAbort >.
Definition at line 1079 of file faults.cc.
References ArmISA::ArmFaultVals< T >::ec(), ArmISA::EC_PREFETCH_ABORT_CURR_EL, ArmISA::EC_PREFETCH_ABORT_LOWER_EL, ArmISA::ArmFault::fromEL, ArmISA::MISCREG_SPSR_HYP, ArmISA::MODE_HYP, ThreadContext::readMiscReg(), ArmISA::ArmFault::to64, and ArmISA::ArmFault::toEL.
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Reimplemented from ArmISA::ArmFault.
Definition at line 1116 of file faults.cc.
References ArmISA::ArmFault::DebugEvent, ArmISA::inSecureState(), ArmISA::MISCREG_CPSR, ArmISA::MISCREG_HCR, ArmISA::MISCREG_HDCR, ArmISA::MISCREG_SCR, ArmISA::MODE_HYP, ArmISA::MODE_USER, ThreadContext::readMiscRegNoEffect(), ArmISA::AbortFault< PrefetchAbort >::source, ArmISA::AbortFault< PrefetchAbort >::stage2, and ArmISA::ArmFault::SynchronousExternalAbort.
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Reimplemented from ArmISA::ArmFaultVals< PrefetchAbort >.
Definition at line 1104 of file faults.cc.
References ArmISA::ArmFault::from64, ArmISA::AbortFault< PrefetchAbort >::isMMUFault(), ArmISA::MISCREG_SCR, ArmISA::MISCREG_SCR_EL3, and ThreadContext::readMiscRegNoEffect().
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