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    gem5
    
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#include <faults.hh>
  
 Public Member Functions | |
| SupervisorCall (ExtMachInst _machInst, uint32_t _iss, ExceptionClass _overrideEc=EC_INVALID) | |
| void | invoke (ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) | 
| bool | routeToHyp (ThreadContext *tc) const | 
| ExceptionClass | ec (ThreadContext *tc) const | 
| uint32_t | iss () const | 
  Public Member Functions inherited from ArmISA::ArmFaultVals< SupervisorCall > | |
| ArmFaultVals (ExtMachInst _machInst=0, uint32_t _iss=0) | |
| FaultName | name () const | 
| FaultStat & | countStat () | 
| FaultOffset | offset (ThreadContext *tc) | 
| FaultOffset | offset64 () | 
| OperatingMode | nextMode () | 
| virtual bool | routeToMonitor (ThreadContext *tc) const | 
| uint8_t | armPcOffset (bool isHyp) | 
| uint8_t | thumbPcOffset (bool isHyp) | 
| uint8_t | armPcElrOffset () | 
| uint8_t | thumbPcElrOffset () | 
| virtual bool | abortDisable (ThreadContext *tc) | 
| virtual bool | fiqDisable (ThreadContext *tc) | 
  Public Member Functions inherited from ArmISA::ArmFault | |
| ArmFault (ExtMachInst _machInst=0, uint32_t _iss=0) | |
| MiscRegIndex | getSyndromeReg64 () const | 
| MiscRegIndex | getFaultAddrReg64 () const | 
| void | invoke64 (ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) | 
| virtual void | annotate (AnnotationIDs id, uint64_t val) | 
| virtual bool | isStage2 () const | 
| virtual FSR | getFsr (ThreadContext *tc) | 
| virtual void | setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg) | 
Protected Attributes | |
| ExceptionClass | overrideEc | 
  Protected Attributes inherited from ArmISA::ArmFault | |
| ExtMachInst | machInst | 
| uint32_t | issRaw | 
| bool | from64 | 
| bool | to64 | 
| ExceptionLevel | fromEL | 
| ExceptionLevel | toEL | 
| OperatingMode | fromMode | 
Additional Inherited Members | |
  Public Types inherited from ArmISA::ArmFault | |
| enum | FaultSource {  AlignmentFault = 0, InstructionCacheMaintenance, SynchExtAbtOnTranslTableWalkLL, SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4, TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4, AccessFlagLL = TranslationLL + 4, DomainLL = AccessFlagLL + 4, PermissionLL = DomainLL + 4, DebugEvent = PermissionLL + 4, SynchronousExternalAbort, TLBConflictAbort, SynchPtyErrOnMemoryAccess, AsynchronousExternalAbort, AsynchPtyErrOnMemoryAccess, AddressSizeLL, PrefetchTLBMiss = AddressSizeLL + 4, PrefetchUncacheable, NumFaultSources, FaultSourceInvalid = 0xff }  | 
| Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use.  More... | |
| enum | AnnotationIDs {  S1PTW, OVA, SAS, SSE, SRT, SF, AR }  | 
| enum | TranMethod { LpaeTran, VmsaTran, UnknownTran } | 
  Static Public Attributes inherited from ArmISA::ArmFault | |
| static uint8_t | shortDescFaultSources [NumFaultSources] | 
| Encodings of the fault sources when the short-desc.  More... | |
| static uint8_t | longDescFaultSources [NumFaultSources] | 
| Encodings of the fault sources when the long-desc.  More... | |
| static uint8_t | aarch64FaultSources [NumFaultSources] | 
| Encodings of the fault sources in AArch64 state.  More... | |
  Protected Member Functions inherited from ArmISA::ArmFault | |
| Addr | getVector (ThreadContext *tc) | 
| Addr | getVector64 (ThreadContext *tc) | 
  Static Protected Attributes inherited from ArmISA::ArmFaultVals< SupervisorCall > | |
| static FaultVals | vals | 
      
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  virtual | 
Reimplemented from ArmISA::ArmFaultVals< SupervisorCall >.
Definition at line 814 of file faults.cc.
References ArmISA::ArmFault::FaultVals::ec, ArmISA::EC_INVALID, ArmISA::EC_SVC_64, ArmISA::ArmFault::from64, overrideEc, and ArmISA::ArmFaultVals< SupervisorCall >::vals.
      
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  virtual | 
Reimplemented from ArmISA::ArmFault.
Definition at line 771 of file faults.cc.
References StaticInst::advancePC(), FullSystem, ArmISA::INTREG_R7, ArmISA::INTREG_X8, ArmISA::ArmFault::invoke(), ArmISA::ArmFault::machInst, ArmISA::MISCREG_CPSR, ArmISA::mode, pc, ThreadContext::pcState(), ThreadContext::readIntReg(), ThreadContext::readMiscReg(), and ThreadContext::syscall().
      
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  virtual | 
Reimplemented from ArmISA::ArmFaultVals< SupervisorCall >.
Definition at line 821 of file faults.cc.
References ArmISA::ArmFault::issRaw.
      
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  virtual | 
Reimplemented from ArmISA::ArmFault.
Definition at line 798 of file faults.cc.
References ArmISA::inSecureState(), ArmISA::MISCREG_CPSR, ArmISA::MISCREG_HCR, ArmISA::MISCREG_SCR, ArmISA::MODE_HYP, ArmISA::MODE_USER, and ThreadContext::readMiscRegNoEffect().
      
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  protected |