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DRAMSim2::MemoryPort Class Reference

The memory port has to deal with its own flow control to avoid having unbounded storage that is implicitly created in the port itself. More...

Inheritance diagram for DRAMSim2::MemoryPort:
SlavePort BaseSlavePort Port

Public Member Functions

 MemoryPort (const std::string &_name, DRAMSim2 &_memory)
 
- Public Member Functions inherited from SlavePort
 SlavePort (const std::string &name, MemObject *owner, PortID id=InvalidPortID)
 Slave port. More...
 
virtual ~SlavePort ()
 
Tick sendAtomicSnoop (PacketPtr pkt)
 Send an atomic snoop request packet, where the data is moved and the state is updated in zero time, without interleaving with other memory accesses. More...
 
void sendFunctionalSnoop (PacketPtr pkt)
 Send a functional snoop request packet, where the data is instantly updated everywhere in the memory system, without affecting the current state of any block or moving the block. More...
 
bool sendTimingResp (PacketPtr pkt)
 Attempt to send a timing response to the master port by calling its corresponding receive function. More...
 
void sendTimingSnoopReq (PacketPtr pkt)
 Attempt to send a timing snoop request packet to the master port by calling its corresponding receive function. More...
 
void sendRetryReq ()
 Send a retry to the master port that previously attempted a sendTimingReq to this slave port and failed. More...
 
void sendRetrySnoopResp ()
 Send a retry to the master port that previously attempted a sendTimingSnoopResp to this slave port and failed. More...
 
bool isSnooping () const
 Find out if the peer master port is snooping or not. More...
 
void sendRangeChange () const
 Called by the owner to send a range change. More...
 
- Public Member Functions inherited from BaseSlavePort
BaseMasterPortgetMasterPort () const
 
bool isConnected () const
 
- Public Member Functions inherited from Port
const std::string name () const
 Return port name (for DPRINTF). More...
 
PortID getId () const
 Get the port id. More...
 

Protected Member Functions

Tick recvAtomic (PacketPtr pkt)
 Receive an atomic request packet from the master port. More...
 
void recvFunctional (PacketPtr pkt)
 Receive a functional request packet from the master port. More...
 
bool recvTimingReq (PacketPtr pkt)
 Receive a timing request from the master port. More...
 
void recvRespRetry ()
 Called by the master port if sendTimingResp was called on this slave port (causing recvTimingResp to be called on the master port) and was unsuccesful. More...
 
AddrRangeList getAddrRanges () const
 Get a list of the non-overlapping address ranges the owner is responsible for. More...
 
- Protected Member Functions inherited from SlavePort
void unbind ()
 Called by the master port to unbind. More...
 
void bind (MasterPort &master_port)
 Called by the master port to bind. More...
 
virtual bool recvTimingSnoopResp (PacketPtr pkt)
 Receive a timing snoop response from the master port. More...
 
- Protected Member Functions inherited from BaseSlavePort
 BaseSlavePort (const std::string &name, MemObject *owner, PortID id=InvalidPortID)
 
virtual ~BaseSlavePort ()
 
- Protected Member Functions inherited from Port
 Port (const std::string &_name, MemObject &_owner, PortID _id)
 Abstract base class for ports. More...
 
virtual ~Port ()
 Virtual destructor due to inheritance. More...
 

Private Attributes

DRAMSim2memory
 

Additional Inherited Members

- Protected Attributes inherited from BaseSlavePort
BaseMasterPort_baseMasterPort
 
- Protected Attributes inherited from Port
const PortID id
 A numeric identifier to distinguish ports in a vector, and set to InvalidPortID in case this port is not part of a vector. More...
 
MemObjectowner
 A reference to the MemObject that owns this port. More...
 

Detailed Description

The memory port has to deal with its own flow control to avoid having unbounded storage that is implicitly created in the port itself.

Definition at line 64 of file dramsim2.hh.

Constructor & Destructor Documentation

DRAMSim2::MemoryPort::MemoryPort ( const std::string &  _name,
DRAMSim2 _memory 
)

Definition at line 356 of file dramsim2.cc.

Member Function Documentation

AddrRangeList DRAMSim2::MemoryPort::getAddrRanges ( ) const
protectedvirtual

Get a list of the non-overlapping address ranges the owner is responsible for.

All slave ports must override this function and return a populated list with at least one item.

Returns
a list of ranges responded to

Implements SlavePort.

Definition at line 362 of file dramsim2.cc.

Tick DRAMSim2::MemoryPort::recvAtomic ( PacketPtr  pkt)
protectedvirtual

Receive an atomic request packet from the master port.

Implements SlavePort.

Definition at line 370 of file dramsim2.cc.

void DRAMSim2::MemoryPort::recvFunctional ( PacketPtr  pkt)
protectedvirtual

Receive a functional request packet from the master port.

Implements SlavePort.

Definition at line 376 of file dramsim2.cc.

void DRAMSim2::MemoryPort::recvRespRetry ( )
protectedvirtual

Called by the master port if sendTimingResp was called on this slave port (causing recvTimingResp to be called on the master port) and was unsuccesful.

Implements SlavePort.

Definition at line 389 of file dramsim2.cc.

bool DRAMSim2::MemoryPort::recvTimingReq ( PacketPtr  pkt)
protectedvirtual

Receive a timing request from the master port.

Implements SlavePort.

Definition at line 382 of file dramsim2.cc.

Member Data Documentation

DRAMSim2& DRAMSim2::MemoryPort::memory
private

Definition at line 69 of file dramsim2.hh.


The documentation for this class was generated from the following files:

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