#include <dramsim2.hh>

Inheritance diagram for DRAMSim2:

Classes
class	MemoryPort
	The memory port has to deal with its own flow control to avoid having unbounded storage that is implicitly created in the port itself. More...

Public Types
typedef DRAMSim2Params	Params

Public Types inherited from AbstractMemory
typedef AbstractMemoryParams	Params

Public Types inherited from MemObject
typedef MemObjectParams	Params

Public Types inherited from ClockedObject
typedef ClockedObjectParams	Params
	Parameters of ClockedObject. More...

Public Types inherited from SimObject
typedef SimObjectParams	Params

Public Member Functions
	DRAMSim2 (const Params *p)

void	readComplete (unsigned id, uint64_t addr, uint64_t cycle)
	Read completion callback. More...

void	writeComplete (unsigned id, uint64_t addr, uint64_t cycle)
	Write completion callback. More...

DrainState	drain () override
	Notify an object that it needs to drain its state. More...

virtual BaseSlavePort &	getSlavePort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a slave port with a given name and index. More...

void	init () override
	Initialise this memory. More...

void	startup () override
	startup() is the final initialization call before simulation. More...

Public Member Functions inherited from AbstractMemory
	AbstractMemory (const Params *p)

virtual	~AbstractMemory ()

bool	isNull () const
	See if this is a null memory that should never store data and always return zero. More...

void	setBackingStore (uint8_t *pmem_addr)
	Set the host memory backing store to be used by this memory controller. More...

const std::list< LockedAddr > &	getLockedAddrList () const
	Get the list of locked addresses to allow checkpointing. More...

void	addLockedAddr (LockedAddr addr)
	Add a locked address to allow for checkpointing. More...

System *	system () const
	read the system pointer Implemented for completeness with the setter More...

void	system (System *sys)
	Set the system pointer on this memory This can't be done via a python parameter because the system needs pointers to all the memories and the reverse would create a cycle in the object graph. More...

const Params *	params () const

AddrRange	getAddrRange () const
	Get the address range. More...

uint64_t	size () const
	Get the memory size. More...

Addr	start () const
	Get the start address. More...

bool	isConfReported () const
	Should this memory be passed to the kernel and part of the OS physical memory layout. More...

bool	isInAddrMap () const
	Some memories are used as shadow memories or should for other reasons not be part of the global address map. More...

bool	isKvmMap () const
	When shadow memories are in use, KVM may want to make one or the other, but cannot map both into the guest address space. More...

void	access (PacketPtr pkt)
	Perform an untimed memory access and update all the state (e.g. More...

void	functionalAccess (PacketPtr pkt)
	Perform an untimed memory read or write without changing anything but the memory itself. More...

void	regStats () override
	Register Statistics. More...

Public Member Functions inherited from MemObject
const Params *	params () const

	MemObject (const Params *params)

virtual BaseMasterPort &	getMasterPort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a master port with a given name and index. More...

Public Member Functions inherited from ClockedObject
	ClockedObject (const ClockedObjectParams *p)

const Params *	params () const

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Enums::PwrState	pwrState () const

std::string	pwrStateName () const

std::vector< double >	pwrStateWeights () const
	Returns the percentage residency for each power state. More...

void	computeStats ()
	Record stats values like state residency by computing the time difference from previous update. More...

void	pwrState (Enums::PwrState)

void	regStats () override
	Register statistics for this object. More...

Public Member Functions inherited from SimObject
const Params *	params () const

	SimObject (const Params *_params)

virtual	~SimObject ()

virtual const std::string	name () const

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	resetStats ()
	Reset statistics associated with this object. More...

virtual void	regProbePoints ()
	Register probe points for this object. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from EventManager
	EventManager (EventManager &em)

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick)-1)

void	setCurTick (Tick newVal)

Public Member Functions inherited from Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

virtual void	notifyFork ()
	Notify a child process of a fork. More...

Public Member Functions inherited from Clocked
void	updateClockPeriod () const
	Update the tick to the current tick. More...

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge. More...

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Protected Member Functions
Tick	recvAtomic (PacketPtr pkt)

void	recvFunctional (PacketPtr pkt)

bool	recvTimingReq (PacketPtr pkt)

void	recvRespRetry ()

Protected Member Functions inherited from AbstractMemory
bool	checkLockedAddrList (PacketPtr pkt)

void	trackLoadLocked (PacketPtr pkt)

bool	writeOK (PacketPtr pkt)

Protected Member Functions inherited from Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain. More...

void	signalDrainDone () const
	Signal that an object is drained. More...

Protected Member Functions inherited from Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters. More...

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance. More...

void	resetClock () const
	Reset the object's clock using the current global tick value. More...

Private Member Functions
unsigned int	nbrOutstanding () const

void	accessAndRespond (PacketPtr pkt)
	When a packet is ready, use the "access()" method in AbstractMemory to actually create the response packet, and send it back to the outside world requestor. More...

void	sendResponse ()

void	tick ()
	Progress the controller one clock cycle. More...

Private Attributes
MemoryPort	port

DRAMSim2Wrapper	wrapper
	The actual DRAMSim2 wrapper. More...

bool	retryReq
	Is the connected port waiting for a retry from us. More...

bool	retryResp
	Are we waiting for a retry for sending a response. More...

Tick	startTick
	Keep track of when the wrapper is started. More...

std::unordered_map< Addr, std::queue< PacketPtr > >	outstandingReads
	Keep track of what packets are outstanding per address, and do so separately for reads and writes. More...

std::unordered_map< Addr, std::queue< PacketPtr > >	outstandingWrites

unsigned int	nbrOutstandingReads
	Count the number of outstanding transactions so that we can block any further requests until there is space in DRAMSim2 and the sending queue we need to buffer the response packets. More...

unsigned int	nbrOutstandingWrites

std::deque< PacketPtr >	responseQueue
	Queue to hold response packets until we can send them back. More...

EventWrapper< DRAMSim2,&DRAMSim2::sendResponse >	sendResponseEvent
	Event to schedule sending of responses. More...

EventWrapper< DRAMSim2,&DRAMSim2::tick >	tickEvent
	Event to schedule clock ticks. More...

std::unique_ptr< Packet >	pendingDelete
	Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call. More...

Additional Inherited Members
Static Public Member Functions inherited from SimObject
static void	serializeAll (CheckpointOut &cp)
	Serialize all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

Static Public Member Functions inherited from Serializable
static const std::string &	currentSection ()
	Get the fully-qualified name of the active section. More...

static void	serializeAll (const std::string &cpt_dir)

static void	unserializeGlobals (CheckpointIn &cp)

Static Public Attributes inherited from Serializable
static int	ckptCount = 0

static int	ckptMaxCount = 0

static int	ckptPrevCount = -1

Protected Attributes inherited from AbstractMemory
AddrRange	range

uint8_t *	pmemAddr

const bool	confTableReported

const bool	inAddrMap

const bool	kvmMap

std::list< LockedAddr >	lockedAddrList

Stats::Vector	bytesRead
	Number of total bytes read from this memory. More...

Stats::Vector	bytesInstRead
	Number of instruction bytes read from this memory. More...

Stats::Vector	bytesWritten
	Number of bytes written to this memory. More...

Stats::Vector	numReads
	Number of read requests. More...

Stats::Vector	numWrites
	Number of write requests. More...

Stats::Vector	numOther
	Number of other requests. More...

Stats::Formula	bwRead
	Read bandwidth from this memory. More...

Stats::Formula	bwInstRead
	Read bandwidth from this memory. More...

Stats::Formula	bwWrite
	Write bandwidth from this memory. More...

Stats::Formula	bwTotal
	Total bandwidth from this memory. More...

System *	_system
	Pointor to the System object. More...

Protected Attributes inherited from ClockedObject
Enums::PwrState	_currPwrState
	To keep track of the current power state. More...

Tick	prvEvalTick

Stats::Scalar	numPwrStateTransitions

Stats::Distribution	pwrStateClkGateDist

Stats::Vector	pwrStateResidencyTicks

Protected Attributes inherited from SimObject
const SimObjectParams *	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Detailed Description

Definition at line 55 of file dramsim2.hh.

Member Typedef Documentation

typedef DRAMSim2Params DRAMSim2::Params

Definition at line 171 of file dramsim2.hh.

Constructor & Destructor Documentation

DRAMSim2::DRAMSim2 ( const Params * p )

Definition at line 49 of file dramsim2.cc.

References DRAMSim2Wrapper::clockPeriod(), DPRINTF, DRAMSim2Wrapper::printStats(), DRAMSim2Wrapper::queueSize(), readComplete(), registerExitCallback(), DRAMSim2Wrapper::setCallbacks(), wrapper, and writeComplete().

Member Function Documentation

void DRAMSim2::accessAndRespond ( PacketPtr pkt )

private

When a packet is ready, use the "access()" method in AbstractMemory to actually create the response packet, and send it back to the outside world requestor.

Parameters

pkt	The packet from the outside world

Definition at line 250 of file dramsim2.cc.

References AbstractMemory::access(), curTick(), DPRINTF, Packet::getAddr(), Packet::headerDelay, Packet::isResponse(), Packet::needsResponse(), Packet::payloadDelay, pendingDelete, responseQueue, retryResp, EventManager::schedule(), Event::scheduled(), and sendResponseEvent.

Referenced by readComplete(), and recvTimingReq().

DrainState DRAMSim2::drain ( )

overridevirtual

Notify an object that it needs to drain its state.

If the object does not need further simulation to drain internal buffers, it returns DrainState::Drained and automatically switches to the Drained state. If the object needs more simulation, it returns DrainState::Draining and automatically enters the Draining state. Other return values are invalid.

Note: An object that has entered the Drained state can be disturbed by other objects in the system and consequently stop being drained. These perturbations are not visible in the drain state. The simulator therefore repeats the draining process until all objects return DrainState::Drained on the first call to drain().

Returns: DrainState::Drained if the object is drained at this point in time, DrainState::Draining if it needs further simulation.

Implements Drainable.

Definition at line 349 of file dramsim2.cc.

References Drained, Draining, and nbrOutstanding().

BaseSlavePort & DRAMSim2::getSlavePort	(	const std::string &	if_name,
		PortID	idx = `InvalidPortID`
	)

overridevirtual

Get a slave port with a given name and index.

This is used at binding time and returns a reference to a protocol-agnostic base master port.

Parameters

if_name	Port name
idx	Index in the case of a VectorPort

Returns: A reference to the given port

Reimplemented from MemObject.

Definition at line 339 of file dramsim2.cc.

References MemObject::getSlavePort(), and port.

void DRAMSim2::init ( )

overridevirtual

Initialise this memory.

Reimplemented from AbstractMemory.

Definition at line 78 of file dramsim2.cc.

References DRAMSim2Wrapper::burstSize(), System::cacheLineSize(), fatal, AbstractMemory::init(), BaseSlavePort::isConnected(), SimObject::name(), port, SlavePort::sendRangeChange(), AbstractMemory::system(), and wrapper.

unsigned int DRAMSim2::nbrOutstanding ( ) const

private

Definition at line 133 of file dramsim2.cc.

References nbrOutstandingReads, nbrOutstandingWrites, and responseQueue.

Referenced by drain(), recvTimingReq(), sendResponse(), tick(), and writeComplete().

void DRAMSim2::readComplete	(	unsigned	id,
		uint64_t	addr,
		uint64_t	cycle
	)

Read completion callback.

Parameters

id	Channel id of the responder
addr	Address of the request
cycle	Internal cycle count of DRAMSim2

Definition at line 286 of file dramsim2.cc.

References accessAndRespond(), DRAMSim2Wrapper::clockPeriod(), curTick(), divCeil(), DPRINTF, nbrOutstandingReads, SimClock::Int::ns, outstandingReads, MipsISA::p, startTick, and wrapper.

Referenced by DRAMSim2().

Tick DRAMSim2::recvAtomic ( PacketPtr pkt )

protected

Definition at line 154 of file dramsim2.cc.

References AbstractMemory::access(), and Packet::cacheResponding().

void DRAMSim2::recvFunctional ( PacketPtr pkt )

protected

Definition at line 163 of file dramsim2.cc.

References Packet::checkFunctional(), AbstractMemory::functionalAccess(), ArmISA::i, SimObject::name(), Packet::popLabel(), Packet::pushLabel(), and responseQueue.

void DRAMSim2::recvRespRetry ( )

protected

Definition at line 240 of file dramsim2.cc.

References DPRINTF, retryResp, and sendResponse().

bool DRAMSim2::recvTimingReq ( PacketPtr pkt )

protected

Definition at line 177 of file dramsim2.cc.

References accessAndRespond(), Packet::cacheResponding(), DRAMSim2Wrapper::canAccept(), DPRINTF, DRAMSim2Wrapper::enqueue(), Packet::getAddr(), Packet::isRead(), Packet::isWrite(), nbrOutstanding(), nbrOutstandingReads, nbrOutstandingWrites, outstandingReads, outstandingWrites, pendingDelete, DRAMSim2Wrapper::queueSize(), retryReq, and wrapper.

void DRAMSim2::sendResponse ( )

private

Definition at line 103 of file dramsim2.cc.

References curTick(), DPRINTF, nbrOutstanding(), nbrOutstandingReads, nbrOutstandingWrites, port, responseQueue, retryResp, EventManager::schedule(), Event::scheduled(), sendResponseEvent, SlavePort::sendTimingResp(), and Drainable::signalDrainDone().

Referenced by recvRespRetry().

void DRAMSim2::startup ( )

overridevirtual

startup() is the final initialization call before simulation.

All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.

Reimplemented from SimObject.

Definition at line 94 of file dramsim2.cc.

References Clocked::clockEdge(), curTick(), EventManager::schedule(), startTick, and tickEvent.

void DRAMSim2::tick ( )

private

Progress the controller one clock cycle.

Definition at line 139 of file dramsim2.cc.

References DRAMSim2Wrapper::clockPeriod(), curTick(), nbrOutstanding(), SimClock::Int::ns, port, DRAMSim2Wrapper::queueSize(), retryReq, EventManager::schedule(), SlavePort::sendRetryReq(), DRAMSim2Wrapper::tick(), tickEvent, and wrapper.

void DRAMSim2::writeComplete	(	unsigned	id,
		uint64_t	addr,
		uint64_t	cycle
	)

Write completion callback.

Parameters

id	Channel id of the responder
addr	Address of the request
cycle	Internal cycle count of DRAMSim2

Definition at line 314 of file dramsim2.cc.

References DRAMSim2Wrapper::clockPeriod(), curTick(), divCeil(), DPRINTF, nbrOutstanding(), nbrOutstandingWrites, SimClock::Int::ns, outstandingWrites, MipsISA::p, Drainable::signalDrainDone(), startTick, and wrapper.

Referenced by DRAMSim2().

Member Data Documentation

unsigned int DRAMSim2::nbrOutstandingReads

private

Count the number of outstanding transactions so that we can block any further requests until there is space in DRAMSim2 and the sending queue we need to buffer the response packets.

Definition at line 125 of file dramsim2.hh.

Referenced by nbrOutstanding(), readComplete(), recvTimingReq(), and sendResponse().

unsigned int DRAMSim2::nbrOutstandingWrites

private

Definition at line 126 of file dramsim2.hh.

Referenced by nbrOutstanding(), recvTimingReq(), sendResponse(), and writeComplete().