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X86ISA::GpuTLB::MemSidePort Member List

This is the complete list of members for X86ISA::GpuTLB::MemSidePort, including all inherited members.

_baseSlavePortBaseMasterPortprotected
BaseMasterPort(const std::string &name, MemObject *owner, PortID id=InvalidPortID)BaseMasterPortprotected
bind(BaseSlavePort &slave_port)MasterPortvirtual
getAddrRanges() const MasterPort
getId() const Portinline
getSlavePort() const BaseMasterPort
idPortprotected
indexX86ISA::GpuTLB::MemSidePortprotected
isConnected() const BaseMasterPort
isSnooping() const MasterPortinlinevirtual
MasterPort(const std::string &name, MemObject *owner, PortID id=InvalidPortID)MasterPort
MemSidePort(const std::string &_name, GpuTLB *gpu_TLB, PortID _index)X86ISA::GpuTLB::MemSidePortinline
name() const Portinline
ownerPortprotected
Port(const std::string &_name, MemObject &_owner, PortID _id)Portprotected
printAddr(Addr a)MasterPort
recvAtomic(PacketPtr pkt)X86ISA::GpuTLB::MemSidePortinlineprotectedvirtual
recvAtomicSnoop(PacketPtr pkt)MasterPortinlineprotectedvirtual
recvFunctional(PacketPtr pkt)X86ISA::GpuTLB::MemSidePortinlineprotectedvirtual
recvFunctionalSnoop(PacketPtr pkt)MasterPortinlineprotectedvirtual
recvRangeChange()X86ISA::GpuTLB::MemSidePortinlineprotectedvirtual
recvReqRetry()X86ISA::GpuTLB::MemSidePortprotectedvirtual
recvRetrySnoopResp()MasterPortinlineprotectedvirtual
recvTimingResp(PacketPtr pkt)X86ISA::GpuTLB::MemSidePortprotectedvirtual
recvTimingSnoopReq(PacketPtr pkt)MasterPortinlineprotectedvirtual
retriesX86ISA::GpuTLB::MemSidePort
sendAtomic(PacketPtr pkt)MasterPort
sendFunctional(PacketPtr pkt)MasterPort
sendRetryResp()MasterPortvirtual
sendTimingReq(PacketPtr pkt)MasterPort
sendTimingSnoopResp(PacketPtr pkt)MasterPort
tlbX86ISA::GpuTLB::MemSidePortprotected
unbind()MasterPortvirtual
~BaseMasterPort()BaseMasterPortprotectedvirtual
~MasterPort()MasterPortvirtual
~Port()Portprotectedvirtual

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