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gem5
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MemSidePort is the TLB Port closer to the memory side If this is a last level TLB then this port will not be connected. More...
#include <gpu_tlb.hh>
Public Member Functions | |
| MemSidePort (const std::string &_name, GpuTLB *gpu_TLB, PortID _index) | |
 Public Member Functions inherited from MasterPort | |
| MasterPort (const std::string &name, MemObject *owner, PortID id=InvalidPortID) | |
| Master port. More... | |
| virtual | ~MasterPort () |
| void | bind (BaseSlavePort &slave_port) |
| Bind this master port to a slave port. More... | |
| void | unbind () |
| Unbind this master port and the associated slave port. More... | |
| Tick | sendAtomic (PacketPtr pkt) |
| Send an atomic request packet, where the data is moved and the state is updated in zero time, without interleaving with other memory accesses. More... | |
| void | sendFunctional (PacketPtr pkt) |
| Send a functional request packet, where the data is instantly updated everywhere in the memory system, without affecting the current state of any block or moving the block. More... | |
| bool | sendTimingReq (PacketPtr pkt) |
| Attempt to send a timing request to the slave port by calling its corresponding receive function. More... | |
| bool | sendTimingSnoopResp (PacketPtr pkt) |
| Attempt to send a timing snoop response packet to the slave port by calling its corresponding receive function. More... | |
| virtual void | sendRetryResp () |
| Send a retry to the slave port that previously attempted a sendTimingResp to this master port and failed. More... | |
| virtual bool | isSnooping () const |
| Determine if this master port is snooping or not. More... | |
| AddrRangeList | getAddrRanges () const |
| Get the address ranges of the connected slave port. More... | |
| void | printAddr (Addr a) |
| Inject a PrintReq for the given address to print the state of that address throughout the memory system. More... | |
| Public Member Functions inherited from BaseMasterPort | |
| BaseSlavePort & | getSlavePort () const |
| bool | isConnected () const |
| Public Member Functions inherited from Port | |
| const std::string | name () const |
| Return port name (for DPRINTF). More... | |
| PortID | getId () const |
| Get the port id. More... | |
Public Attributes | |
| std::deque< PacketPtr > | retries |
Protected Member Functions | |
| virtual bool | recvTimingResp (PacketPtr pkt) |
| MemSidePort receives the packet back. More... | |
| virtual Tick | recvAtomic (PacketPtr pkt) |
| virtual void | recvFunctional (PacketPtr pkt) |
| virtual void | recvRangeChange () |
| Called to receive an address range change from the peer slave port. More... | |
| virtual void | recvReqRetry () |
| Called by the slave port if sendTimingReq was called on this master port (causing recvTimingReq to be called on the slave port) and was unsuccesful. More... | |
| Protected Member Functions inherited from MasterPort | |
| virtual Tick | recvAtomicSnoop (PacketPtr pkt) |
| Receive an atomic snoop request packet from the slave port. More... | |
| virtual void | recvFunctionalSnoop (PacketPtr pkt) |
| Receive a functional snoop request packet from the slave port. More... | |
| virtual void | recvTimingSnoopReq (PacketPtr pkt) |
| Receive a timing snoop request from the slave port. More... | |
| virtual void | recvRetrySnoopResp () |
| Called by the slave port if sendTimingSnoopResp was called on this master port (causing recvTimingSnoopResp to be called on the slave port) and was unsuccesful. More... | |
| Protected Member Functions inherited from BaseMasterPort | |
| BaseMasterPort (const std::string &name, MemObject *owner, PortID id=InvalidPortID) | |
| virtual | ~BaseMasterPort () |
| Protected Member Functions inherited from Port | |
| Port (const std::string &_name, MemObject &_owner, PortID _id) | |
| Abstract base class for ports. More... | |
| virtual | ~Port () |
| Virtual destructor due to inheritance. More... | |
Protected Attributes | |
| GpuTLB * | tlb |
| int | index |
| Protected Attributes inherited from BaseMasterPort | |
| BaseSlavePort * | _baseSlavePort |
| Protected Attributes inherited from Port | |
| const PortID | id |
| A numeric identifier to distinguish ports in a vector, and set to InvalidPortID in case this port is not part of a vector. More... | |
| MemObject & | owner |
| A reference to the MemObject that owns this port. More... | |
MemSidePort is the TLB Port closer to the memory side If this is a last level TLB then this port will not be connected.
Future action item: if we ever do real page walks, then this port should be connected to a RubyPort.
Definition at line 296 of file gpu_tlb.hh.
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inline |
Definition at line 299 of file gpu_tlb.hh.
Definition at line 310 of file gpu_tlb.hh.
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inlineprotectedvirtual |
Definition at line 311 of file gpu_tlb.hh.
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inlineprotectedvirtual |
Called to receive an address range change from the peer slave port.
The default implementation ignores the change and does nothing. Override this function in a derived class if the owner needs to be aware of the address ranges, e.g. in an interconnect component like a bus.
Reimplemented from MasterPort.
Definition at line 312 of file gpu_tlb.hh.
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protectedvirtual |
Called by the slave port if sendTimingReq was called on this master port (causing recvTimingReq to be called on the slave port) and was unsuccesful.
Implements MasterPort.
Definition at line 1634 of file gpu_tlb.cc.
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protectedvirtual |
MemSidePort receives the packet back.
We need to call the handleTranslationReturn and propagate up the hierarchy.
Implements MasterPort.
Definition at line 1615 of file gpu_tlb.cc.
References curTick(), DPRINTF, X86ISA::GpuTLB::TLBEvent::getTLBEventVaddr(), Request::getVaddr(), X86ISA::GpuTLB::MISS_RETURN, AlphaISA::PageBytes, Packet::req, roundDown(), X86ISA::GpuTLB::tlb, and X86ISA::GpuTLB::TLBEvent::updateOutcome().
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protected |
Definition at line 307 of file gpu_tlb.hh.
| std::deque<PacketPtr> X86ISA::GpuTLB::MemSidePort::retries |
Definition at line 303 of file gpu_tlb.hh.
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protected |
Definition at line 306 of file gpu_tlb.hh.