31 #ifndef __DEV_X86_I82094AA_HH__
32 #define __DEV_X86_I82094AA_HH__
39 #include "params/I82094AA.hh"
90 return dynamic_cast<const Params *
>(
_params);
120 #endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__
bool pinStates[TableSize]
Bitfield< 31, 17 > bottomReserved
const PortID InvalidPortID
void lowerInterruptPin(int number) override
EndBitUnion(TriggerIntMessage) namespace DeliveryMode
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
BaseMasterPort & getMasterPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a master port with a given name and index.
Tick recvResponse(PacketPtr pkt) override
static const uint8_t TableSize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Bitfield< 10, 8 > deliveryMode
void raiseInterruptPin(int number) override
uint32_t readReg(uint8_t offset)
uint64_t Tick
Tick count type.
BitUnion64(RedirTableEntry) Bitfield< 63
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Bitfield< 12 > deliveryStatus
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
void writeReg(uint8_t offset, uint32_t value)
Bitfield< 31, 0 > bottomDW
EndBitUnion(RedirTableEntry) protected uint8_t regSel
AddrRangeList getIntAddrRange() const override
Bitfield< 55, 32 > topReserved
std::ostream CheckpointOut
A BaseMasterPort is a protocol-agnostic master port, responsible only for the structural connection t...
void unserialize(CheckpointIn &cp) override
Unserialize an object.
uint64_t lowestPriorityOffset
const SimObjectParams * _params
Cached copy of the object parameters.
RedirTableEntry redirTable[TableSize]
static const uint8_t APICVersion
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
void signalInterrupt(int line) override
const Params * params() const