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FullO3CPU< Impl > Class Template Reference

FullO3CPU class, has each of the stages (fetch through commit) within it, as well as all of the time buffers between stages. More...

#include <cpu.hh>

Inheritance diagram for FullO3CPU< Impl >:
BaseO3CPU BaseCPU

Classes

class  DcachePort
 DcachePort class for the load/store queue. More...
 
class  IcachePort
 IcachePort class for instruction fetch. More...
 
class  TickEvent
 

Public Types

enum  Status {
  Running, Idle, Halted, Blocked,
  SwitchedOut
}
 
enum  StageIdx {
  FetchIdx, DecodeIdx, RenameIdx, IEWIdx,
  CommitIdx, NumStages
}
 Enum to give each stage a specific index, so when calling activateStage() or deactivateStage(), they can specify which stage is being activated/deactivated. More...
 
typedef Impl::CPUPol CPUPolicy
 
typedef Impl::DynInstPtr DynInstPtr
 
typedef Impl::O3CPU O3CPU
 
typedef O3ThreadState< Impl > ImplState
 
typedef O3ThreadState< Impl > Thread
 
typedef std::list< DynInstPtr >
::iterator 
ListIt
 
typedef CPUPolicy::TimeStruct TimeStruct
 Typedefs from the Impl to get the structs that each of the time buffers should use. More...
 
typedef CPUPolicy::FetchStruct FetchStruct
 
typedef CPUPolicy::DecodeStruct DecodeStruct
 
typedef CPUPolicy::RenameStruct RenameStruct
 
typedef CPUPolicy::IEWStruct IEWStruct
 

Public Member Functions

 FullO3CPU (DerivO3CPUParams *params)
 Constructs a CPU with the given parameters. More...
 
 ~FullO3CPU ()
 Destructor. More...
 
void regStats () override
 Registers statistics. More...
 
void regProbePoints () override
 Register probe points. More...
 
void demapPage (Addr vaddr, uint64_t asn)
 
void demapInstPage (Addr vaddr, uint64_t asn)
 
void demapDataPage (Addr vaddr, uint64_t asn)
 
void tick ()
 Ticks CPU, calling tick() on each stage, and checking the overall activity to see if the CPU should deschedule itself. More...
 
void init () override
 Initialize the CPU. More...
 
void startup () override
 
int numActiveThreads ()
 Returns the Number of Active Threads in the CPU. More...
 
void activateThread (ThreadID tid)
 Add Thread to Active Threads List. More...
 
void deactivateThread (ThreadID tid)
 Remove Thread from Active Threads List. More...
 
void insertThread (ThreadID tid)
 Setup CPU to insert a thread's context. More...
 
void removeThread (ThreadID tid)
 Remove all of a thread's context from CPU. More...
 
Counter totalInsts () const override
 Count the Total Instructions Committed in the CPU. More...
 
Counter totalOps () const override
 Count the Total Ops (including micro ops) committed in the CPU. More...
 
void activateContext (ThreadID tid) override
 Add Thread to Active Threads List. More...
 
void suspendContext (ThreadID tid) override
 Remove Thread from Active Threads List. More...
 
void haltContext (ThreadID tid) override
 Remove Thread from Active Threads List && Remove Thread Context from CPU. More...
 
void updateThreadPriority ()
 Update The Order In Which We Process Threads. More...
 
bool isDraining () const
 Is the CPU draining? More...
 
void serializeThread (CheckpointOut &cp, ThreadID tid) const override
 
void unserializeThread (CheckpointIn &cp, ThreadID tid) override
 
void syscall (int64_t callnum, ThreadID tid, Fault *fault)
 Executes a syscall. More...
 
DrainState drain () override
 Starts draining the CPU's pipeline of all instructions in order to stop all memory accesses. More...
 
void drainResume () override
 Resumes execution after a drain. More...
 
void commitDrained (ThreadID tid)
 Commit has reached a safe point to drain a thread. More...
 
void switchOut () override
 Switches out this CPU. More...
 
void takeOverFrom (BaseCPU *oldCPU) override
 Takes over from another CPU. More...
 
void verifyMemoryMode () const override
 
InstSeqNum getAndIncrementInstSeq ()
 Get the current instruction sequence number, and increment it. More...
 
void trap (const Fault &fault, ThreadID tid, const StaticInstPtr &inst)
 Traps to handle given fault. More...
 
Fault hwrei (ThreadID tid)
 HW return from error interrupt. More...
 
bool simPalCheck (int palFunc, ThreadID tid)
 
Fault getInterrupts ()
 Returns the Fault for any valid interrupt. More...
 
void processInterrupts (const Fault &interrupt)
 Processes any an interrupt fault. More...
 
void halt ()
 Halts the CPU. More...
 
TheISA::MiscReg readMiscRegNoEffect (int misc_reg, ThreadID tid) const
 Register accessors. More...
 
TheISA::MiscReg readMiscReg (int misc_reg, ThreadID tid)
 Reads a misc. More...
 
void setMiscRegNoEffect (int misc_reg, const TheISA::MiscReg &val, ThreadID tid)
 Sets a miscellaneous register. More...
 
void setMiscReg (int misc_reg, const TheISA::MiscReg &val, ThreadID tid)
 Sets a misc. More...
 
uint64_t readIntReg (int reg_idx)
 
TheISA::FloatReg readFloatReg (int reg_idx)
 
TheISA::FloatRegBits readFloatRegBits (int reg_idx)
 
TheISA::CCReg readCCReg (int reg_idx)
 
void setIntReg (int reg_idx, uint64_t val)
 
void setFloatReg (int reg_idx, TheISA::FloatReg val)
 
void setFloatRegBits (int reg_idx, TheISA::FloatRegBits val)
 
void setCCReg (int reg_idx, TheISA::CCReg val)
 
uint64_t readArchIntReg (int reg_idx, ThreadID tid)
 
float readArchFloatReg (int reg_idx, ThreadID tid)
 
uint64_t readArchFloatRegInt (int reg_idx, ThreadID tid)
 
TheISA::CCReg readArchCCReg (int reg_idx, ThreadID tid)
 
void setArchIntReg (int reg_idx, uint64_t val, ThreadID tid)
 Architectural register accessors. More...
 
void setArchFloatReg (int reg_idx, float val, ThreadID tid)
 
void setArchFloatRegInt (int reg_idx, uint64_t val, ThreadID tid)
 
void setArchCCReg (int reg_idx, TheISA::CCReg val, ThreadID tid)
 
void pcState (const TheISA::PCState &newPCState, ThreadID tid)
 Sets the commit PC state of a specific thread. More...
 
TheISA::PCState pcState (ThreadID tid)
 Reads the commit PC state of a specific thread. More...
 
Addr instAddr (ThreadID tid)
 Reads the commit PC of a specific thread. More...
 
MicroPC microPC (ThreadID tid)
 Reads the commit micro PC of a specific thread. More...
 
Addr nextInstAddr (ThreadID tid)
 Reads the next PC of a specific thread. More...
 
void squashFromTC (ThreadID tid)
 Initiates a squash of all in-flight instructions for a given thread. More...
 
ListIt addInst (DynInstPtr &inst)
 Function to add instruction onto the head of the list of the instructions. More...
 
void instDone (ThreadID tid, DynInstPtr &inst)
 Function to tell the CPU that an instruction has completed. More...
 
void removeFrontInst (DynInstPtr &inst)
 Remove an instruction from the front end of the list. More...
 
void removeInstsNotInROB (ThreadID tid)
 Remove all instructions that are not currently in the ROB. More...
 
void removeInstsUntil (const InstSeqNum &seq_num, ThreadID tid)
 Remove all instructions younger than the given sequence number. More...
 
void squashInstIt (const ListIt &instIt, ThreadID tid)
 Removes the instruction pointed to by the iterator. More...
 
void cleanUpRemovedInsts ()
 Cleans up all instructions on the remove list. More...
 
void dumpInsts ()
 Debug function to print all instructions on the list. More...
 
void activityThisCycle ()
 Records that there was time buffer activity this cycle. More...
 
void activateStage (const StageIdx idx)
 Changes a stage's status to active within the activity recorder. More...
 
void deactivateStage (const StageIdx idx)
 Changes a stage's status to inactive within the activity recorder. More...
 
void wakeCPU ()
 Wakes the CPU, rescheduling the CPU if it's not already active. More...
 
virtual void wakeup (ThreadID tid) override
 
ThreadID getFreeTid ()
 Gets a free thread id. More...
 
ThreadContexttcBase (ThreadID tid)
 Returns a pointer to a thread context. More...
 
Fault read (RequestPtr &req, RequestPtr &sreqLow, RequestPtr &sreqHigh, int load_idx)
 CPU read function, forwards read to LSQ. More...
 
Fault write (RequestPtr &req, RequestPtr &sreqLow, RequestPtr &sreqHigh, uint8_t *data, int store_idx)
 CPU write function, forwards write to LSQ. More...
 
MasterPortgetInstPort () override
 Used by the fetch unit to get a hold of the instruction port. More...
 
MasterPortgetDataPort () override
 Get the dcache port (used to find block size for translations). More...
 
- Public Member Functions inherited from BaseO3CPU
 BaseO3CPU (BaseCPUParams *params)
 
void regStats ()
 

Public Attributes

TheISA::TLB * itb
 
TheISA::TLB * dtb
 
Status _status
 Overall CPU status. More...
 
ProbePointArg< PacketPtr > * ppInstAccessComplete
 
ProbePointArg< std::pair
< DynInstPtr, PacketPtr > > * 
ppDataAccessComplete
 
int instcount
 Count of total number of dynamic instructions in flight. More...
 
std::list< DynInstPtrinstList
 List of all the instructions in flight. More...
 
std::queue< ListItremoveList
 List of all the instructions that will be removed at the end of this cycle. More...
 
bool removeInstsThisCycle
 Records if instructions need to be removed this cycle due to being retired or squashed. More...
 
TimeBuffer< TimeStructtimeBuffer
 The main time buffer to do backwards communication. More...
 
TimeBuffer< FetchStructfetchQueue
 The fetch stage's instruction queue. More...
 
TimeBuffer< DecodeStructdecodeQueue
 The decode stage's instruction queue. More...
 
TimeBuffer< RenameStructrenameQueue
 The rename stage's instruction queue. More...
 
TimeBuffer< IEWStructiewQueue
 The IEW stage's instruction queue. More...
 
InstSeqNum globalSeqNum
 The global sequence number counter. More...
 
Checker< Impl > * checker
 Pointer to the checker, which can dynamically verify instruction results at run time. More...
 
Systemsystem
 Pointer to the system. More...
 
std::vector< Thread * > thread
 Pointers to all of the threads in the CPU. More...
 
std::list< int > cpuWaitList
 Threads Scheduled to Enter CPU. More...
 
Cycles lastRunningCycle
 The cycle that the CPU was last running, used for statistics. More...
 
Tick lastActivatedCycle
 The cycle that the CPU was last activated by a new thread. More...
 
std::map< ThreadID, unsigned > threadMap
 Mapping for system thread id to cpu id. More...
 
std::vector< ThreadIDtids
 Available thread ids in the cpu. More...
 
Stats::Scalar timesIdled
 Stat for total number of times the CPU is descheduled. More...
 
Stats::Scalar idleCycles
 Stat for total number of cycles the CPU spends descheduled. More...
 
Stats::Scalar quiesceCycles
 Stat for total number of cycles the CPU spends descheduled due to a quiesce operation or waiting for an interrupt. More...
 
Stats::Vector committedInsts
 Stat for the number of committed instructions per thread. More...
 
Stats::Vector committedOps
 Stat for the number of committed ops (including micro ops) per thread. More...
 
Stats::Formula cpi
 Stat for the CPI per thread. More...
 
Stats::Formula totalCpi
 Stat for the total CPI. More...
 
Stats::Formula ipc
 Stat for the IPC per thread. More...
 
Stats::Formula totalIpc
 Stat for the total IPC. More...
 
Stats::Scalar intRegfileReads
 
Stats::Scalar intRegfileWrites
 
Stats::Scalar fpRegfileReads
 
Stats::Scalar fpRegfileWrites
 
Stats::Scalar ccRegfileReads
 
Stats::Scalar ccRegfileWrites
 
Stats::Scalar miscRegfileReads
 
Stats::Scalar miscRegfileWrites
 

Protected Attributes

CPUPolicy::Fetch fetch
 The fetch stage. More...
 
CPUPolicy::Decode decode
 The decode stage. More...
 
CPUPolicy::Rename rename
 The dispatch stage. More...
 
CPUPolicy::IEW iew
 The issue/execute/writeback stages. More...
 
CPUPolicy::Commit commit
 The commit stage. More...
 
PhysRegFile regFile
 The register file. More...
 
CPUPolicy::FreeList freeList
 The free list. More...
 
CPUPolicy::RenameMap renameMap [Impl::MaxThreads]
 The rename map. More...
 
CPUPolicy::RenameMap commitRenameMap [Impl::MaxThreads]
 The commit rename map. More...
 
CPUPolicy::ROB rob
 The re-order buffer. More...
 
std::list< ThreadIDactiveThreads
 Active Threads List. More...
 
Scoreboard scoreboard
 Integer Register Scoreboard. More...
 
std::vector< TheISA::ISA * > isa
 
IcachePort icachePort
 Instruction port. More...
 
DcachePort dcachePort
 Data port. More...
 

Private Member Functions

void scheduleTickEvent (Cycles delay)
 Schedule tick event, regardless of its current state. More...
 
void unscheduleTickEvent ()
 Unschedule tick event, regardless of its current state. More...
 
bool tryDrain ()
 Check if the pipeline has drained and signal drain done. More...
 
void drainSanityCheck () const
 Perform sanity checks after a drain. More...
 
bool isDrained () const
 Check if a system is in a drained state. More...
 

Private Attributes

TickEvent tickEvent
 The tick event used for scheduling CPU ticks. More...
 
ActivityRecorder activityRec
 The activity recorder; used to tell if the CPU has any activity remaining or if it can go to idle and deschedule itself. More...
 

Friends

class O3ThreadContext< Impl >
 

Additional Inherited Members

- Static Public Member Functions inherited from BaseCPU
static int numSimulatedInsts ()
 
static int numSimulatedOps ()
 
static void wakeup (ThreadID tid)
 

Detailed Description

template<class Impl>
class FullO3CPU< Impl >

FullO3CPU class, has each of the stages (fetch through commit) within it, as well as all of the time buffers between stages.

The tick() function for the CPU is defined here.

Definition at line 98 of file cpu.hh.

Member Typedef Documentation

template<class Impl>
typedef Impl::CPUPol FullO3CPU< Impl >::CPUPolicy

Definition at line 102 of file cpu.hh.

template<class Impl>
typedef CPUPolicy::DecodeStruct FullO3CPU< Impl >::DecodeStruct

Definition at line 592 of file cpu.hh.

template<class Impl>
typedef Impl::DynInstPtr FullO3CPU< Impl >::DynInstPtr

Definition at line 103 of file cpu.hh.

template<class Impl>
typedef CPUPolicy::FetchStruct FullO3CPU< Impl >::FetchStruct

Definition at line 590 of file cpu.hh.

template<class Impl>
typedef CPUPolicy::IEWStruct FullO3CPU< Impl >::IEWStruct

Definition at line 596 of file cpu.hh.

template<class Impl>
typedef O3ThreadState<Impl> FullO3CPU< Impl >::ImplState

Definition at line 106 of file cpu.hh.

template<class Impl>
typedef std::list<DynInstPtr>::iterator FullO3CPU< Impl >::ListIt

Definition at line 109 of file cpu.hh.

template<class Impl>
typedef Impl::O3CPU FullO3CPU< Impl >::O3CPU

Definition at line 104 of file cpu.hh.

template<class Impl>
typedef CPUPolicy::RenameStruct FullO3CPU< Impl >::RenameStruct

Definition at line 594 of file cpu.hh.

template<class Impl>
typedef O3ThreadState<Impl> FullO3CPU< Impl >::Thread

Definition at line 107 of file cpu.hh.

template<class Impl>
typedef CPUPolicy::TimeStruct FullO3CPU< Impl >::TimeStruct

Typedefs from the Impl to get the structs that each of the time buffers should use.

Definition at line 588 of file cpu.hh.

Member Enumeration Documentation

template<class Impl>
enum FullO3CPU::StageIdx

Enum to give each stage a specific index, so when calling activateStage() or deactivateStage(), they can specify which stage is being activated/deactivated.

Enumerator
FetchIdx 
DecodeIdx 
RenameIdx 
IEWIdx 
CommitIdx 
NumStages 

Definition at line 577 of file cpu.hh.

template<class Impl>
enum FullO3CPU::Status
Enumerator
Running 
Idle 
Halted 
Blocked 
SwitchedOut 

Definition at line 114 of file cpu.hh.

Constructor & Destructor Documentation

template<class Impl >
FullO3CPU< Impl >::FullO3CPU ( DerivO3CPUParams *  params)
template<class Impl >
FullO3CPU< Impl >::~FullO3CPU ( )

Destructor.

Definition at line 406 of file cpu.cc.

Member Function Documentation

template<class Impl >
void FullO3CPU< Impl >::activateContext ( ThreadID  tid)
override

Add Thread to Active Threads List.

Definition at line 707 of file cpu.cc.

References curTick(), Drained, PseudoInst::quiesceCycles(), and Running.

template<class Impl>
void FullO3CPU< Impl >::activateStage ( const StageIdx  idx)
inline

Changes a stage's status to active within the activity recorder.

Definition at line 625 of file cpu.hh.

template<class Impl >
void FullO3CPU< Impl >::activateThread ( ThreadID  tid)

Add Thread to Active Threads List.

Definition at line 642 of file cpu.cc.

References DPRINTF.

template<class Impl>
void FullO3CPU< Impl >::activityThisCycle ( )
inline

Records that there was time buffer activity this cycle.

Definition at line 622 of file cpu.hh.

template<class Impl >
FullO3CPU< Impl >::ListIt FullO3CPU< Impl >::addInst ( DynInstPtr inst)

Function to add instruction onto the head of the list of the instructions.

Used when new instructions are fetched.

Definition at line 1425 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::cleanUpRemovedInsts ( )

Cleans up all instructions on the remove list.

Definition at line 1565 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::commitDrained ( ThreadID  tid)

Commit has reached a safe point to drain a thread.

Commit calls this method to inform the pipeline that it has reached a point where it is not executed microcode and is about to squash uncommitted instructions to fully drain the pipeline.

Definition at line 1125 of file cpu.cc.

template<class Impl>
void FullO3CPU< Impl >::deactivateStage ( const StageIdx  idx)
inline

Changes a stage's status to inactive within the activity recorder.

Definition at line 629 of file cpu.hh.

template<class Impl >
void FullO3CPU< Impl >::deactivateThread ( ThreadID  tid)

Remove Thread from Active Threads List.

Definition at line 660 of file cpu.cc.

References DPRINTF.

template<class Impl>
void FullO3CPU< Impl >::demapDataPage ( Addr  vaddr,
uint64_t  asn 
)
inline

Definition at line 286 of file cpu.hh.

template<class Impl>
void FullO3CPU< Impl >::demapInstPage ( Addr  vaddr,
uint64_t  asn 
)
inline

Definition at line 281 of file cpu.hh.

template<class Impl>
void FullO3CPU< Impl >::demapPage ( Addr  vaddr,
uint64_t  asn 
)
inline

Definition at line 275 of file cpu.hh.

template<class Impl >
DrainState FullO3CPU< Impl >::drain ( )
override

Starts draining the CPU's pipeline of all instructions in order to stop all memory accesses.

Definition at line 1009 of file cpu.cc.

References DPRINTF, Drained, Draining, ArmISA::i, and PseudoInst::wakeCPU().

template<class Impl >
void FullO3CPU< Impl >::drainResume ( )
override

Resumes execution after a drain.

Definition at line 1132 of file cpu.cc.

References ThreadContext::Active, DPRINTF, ArmISA::i, Running, and ArmISA::status.

template<class Impl >
void FullO3CPU< Impl >::drainSanityCheck ( ) const
private

Perform sanity checks after a drain.

This method is called from drain() when it has determined that the CPU is fully drained when gem5 is compiled with the NDEBUG macro undefined. The intention of this method is to do more extensive tests than the isDrained() method to weed out any draining bugs.

Definition at line 1074 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::dumpInsts ( )

Debug function to print all instructions on the list.

Definition at line 1591 of file cpu.cc.

References cprintf().

template<class Impl>
InstSeqNum FullO3CPU< Impl >::getAndIncrementInstSeq ( )
inline

Get the current instruction sequence number, and increment it.

Definition at line 374 of file cpu.hh.

template<class Impl>
MasterPort& FullO3CPU< Impl >::getDataPort ( )
inlineoverride

Get the dcache port (used to find block size for translations).

Definition at line 697 of file cpu.hh.

template<class Impl >
ThreadID FullO3CPU< Impl >::getFreeTid ( )

Gets a free thread id.

Use if thread ids change across system.

Definition at line 1655 of file cpu.cc.

References InvalidThreadID.

template<class Impl>
MasterPort& FullO3CPU< Impl >::getInstPort ( )
inlineoverride

Used by the fetch unit to get a hold of the instruction port.

Definition at line 694 of file cpu.hh.

template<class Impl >
Fault FullO3CPU< Impl >::getInterrupts ( )

Returns the Fault for any valid interrupt.

Definition at line 941 of file cpu.cc.

template<class Impl>
void FullO3CPU< Impl >::halt ( )
inline

Halts the CPU.

Definition at line 392 of file cpu.hh.

template<class Impl >
void FullO3CPU< Impl >::haltContext ( ThreadID  tid)
override

Remove Thread from Active Threads List && Remove Thread Context from CPU.

Definition at line 767 of file cpu.cc.

References DPRINTF.

template<class Impl >
Fault FullO3CPU< Impl >::hwrei ( ThreadID  tid)

HW return from error interrupt.

Definition at line 900 of file cpu.cc.

References AlphaISA::MISCREG_LOCKFLAG, and NoFault.

template<class Impl >
void FullO3CPU< Impl >::init ( )
override

Initialize the CPU.

Definition at line 599 of file cpu.cc.

References ThreadContext::contextId(), FullSystem, Stats::init, and AlphaISA::initCPU().

template<class Impl >
void FullO3CPU< Impl >::insertThread ( ThreadID  tid)
template<class Impl >
Addr FullO3CPU< Impl >::instAddr ( ThreadID  tid)

Reads the commit PC of a specific thread.

Definition at line 1396 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::instDone ( ThreadID  tid,
DynInstPtr inst 
)

Function to tell the CPU that an instruction has completed.

Definition at line 1434 of file cpu.cc.

References ArmISA::system.

template<class Impl >
bool FullO3CPU< Impl >::isDrained ( ) const
private

Check if a system is in a drained state.

Definition at line 1086 of file cpu.cc.

References DPRINTF.

template<class Impl>
bool FullO3CPU< Impl >::isDraining ( ) const
inline

Is the CPU draining?

Definition at line 338 of file cpu.hh.

template<class Impl >
MicroPC FullO3CPU< Impl >::microPC ( ThreadID  tid)

Reads the commit micro PC of a specific thread.

Definition at line 1410 of file cpu.cc.

template<class Impl >
Addr FullO3CPU< Impl >::nextInstAddr ( ThreadID  tid)

Reads the next PC of a specific thread.

Definition at line 1403 of file cpu.cc.

template<class Impl>
int FullO3CPU< Impl >::numActiveThreads ( )
inline

Returns the Number of Active Threads in the CPU.

Definition at line 302 of file cpu.hh.

template<class Impl >
void FullO3CPU< Impl >::pcState ( const TheISA::PCState &  newPCState,
ThreadID  tid 
)

Sets the commit PC state of a specific thread.

Definition at line 1389 of file cpu.cc.

template<class Impl >
TheISA::PCState FullO3CPU< Impl >::pcState ( ThreadID  tid)

Reads the commit PC state of a specific thread.

Definition at line 1382 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::processInterrupts ( const Fault interrupt)

Processes any an interrupt fault.

Definition at line 949 of file cpu.cc.

References DPRINTF, and NoFault.

template<class Impl>
Fault FullO3CPU< Impl >::read ( RequestPtr req,
RequestPtr sreqLow,
RequestPtr sreqHigh,
int  load_idx 
)
inline

CPU read function, forwards read to LSQ.

Definition at line 679 of file cpu.hh.

template<class Impl >
CCReg FullO3CPU< Impl >::readArchCCReg ( int  reg_idx,
ThreadID  tid 
)

Definition at line 1332 of file cpu.cc.

template<class Impl >
float FullO3CPU< Impl >::readArchFloatReg ( int  reg_idx,
ThreadID  tid 
)

Definition at line 1312 of file cpu.cc.

template<class Impl >
uint64_t FullO3CPU< Impl >::readArchFloatRegInt ( int  reg_idx,
ThreadID  tid 
)

Definition at line 1322 of file cpu.cc.

template<class Impl >
uint64_t FullO3CPU< Impl >::readArchIntReg ( int  reg_idx,
ThreadID  tid 
)

Definition at line 1302 of file cpu.cc.

template<class Impl >
CCReg FullO3CPU< Impl >::readCCReg ( int  reg_idx)

Definition at line 1262 of file cpu.cc.

template<class Impl >
FloatReg FullO3CPU< Impl >::readFloatReg ( int  reg_idx)

Definition at line 1246 of file cpu.cc.

template<class Impl >
FloatRegBits FullO3CPU< Impl >::readFloatRegBits ( int  reg_idx)

Definition at line 1254 of file cpu.cc.

template<class Impl >
uint64_t FullO3CPU< Impl >::readIntReg ( int  reg_idx)

Definition at line 1238 of file cpu.cc.

template<class Impl >
TheISA::MiscReg FullO3CPU< Impl >::readMiscReg ( int  misc_reg,
ThreadID  tid 
)

Reads a misc.

register, including any side effects the read might have as defined by the architecture.

Definition at line 1213 of file cpu.cc.

template<class Impl >
TheISA::MiscReg FullO3CPU< Impl >::readMiscRegNoEffect ( int  misc_reg,
ThreadID  tid 
) const

Register accessors.

Index refers to the physical register index. Reads a miscellaneous register.

Definition at line 1206 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::regProbePoints ( )
override

Register probe points.

Definition at line 412 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::regStats ( )
override

Registers statistics.

Definition at line 427 of file cpu.cc.

References name(), PseudoInst::quiesceCycles(), BaseO3CPU::regStats(), Stats::sum(), and Stats::total.

template<class Impl >
void FullO3CPU< Impl >::removeFrontInst ( DynInstPtr inst)

Remove an instruction from the front end of the list.

There's no restriction on location of the instruction.

Definition at line 1456 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::removeInstsNotInROB ( ThreadID  tid)

Remove all instructions that are not currently in the ROB.

There's also an option to not squash delay slot instructions.

Definition at line 1470 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::removeInstsUntil ( const InstSeqNum seq_num,
ThreadID  tid 
)

Remove all instructions younger than the given sequence number.

Definition at line 1515 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::removeThread ( ThreadID  tid)

Remove all of a thread's context from CPU.

Definition at line 834 of file cpu.cc.

References AlphaISA::CC_Reg_Base, DPRINTF, AlphaISA::FP_Reg_Base, AlphaISA::NumCCRegs, AlphaISA::NumFloatRegs, and AlphaISA::NumIntRegs.

template<class Impl>
void FullO3CPU< Impl >::scheduleTickEvent ( Cycles  delay)
inlineprivate

Schedule tick event, regardless of its current state.

Definition at line 218 of file cpu.hh.

template<class Impl >
void FullO3CPU< Impl >::serializeThread ( CheckpointOut cp,
ThreadID  tid 
) const
override

Definition at line 995 of file cpu.cc.

template<class Impl>
void FullO3CPU< Impl >::setArchCCReg ( int  reg_idx,
TheISA::CCReg  val,
ThreadID  tid 
)

Definition at line 1372 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::setArchFloatReg ( int  reg_idx,
float  val,
ThreadID  tid 
)

Definition at line 1352 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::setArchFloatRegInt ( int  reg_idx,
uint64_t  val,
ThreadID  tid 
)

Definition at line 1362 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::setArchIntReg ( int  reg_idx,
uint64_t  val,
ThreadID  tid 
)

Architectural register accessors.

Looks up in the commit rename table to obtain the true physical index of the architected register first, then accesses that physical register.

Definition at line 1342 of file cpu.cc.

template<class Impl>
void FullO3CPU< Impl >::setCCReg ( int  reg_idx,
TheISA::CCReg  val 
)

Definition at line 1294 of file cpu.cc.

template<class Impl>
void FullO3CPU< Impl >::setFloatReg ( int  reg_idx,
TheISA::FloatReg  val 
)

Definition at line 1278 of file cpu.cc.

template<class Impl>
void FullO3CPU< Impl >::setFloatRegBits ( int  reg_idx,
TheISA::FloatRegBits  val 
)

Definition at line 1286 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::setIntReg ( int  reg_idx,
uint64_t  val 
)

Definition at line 1270 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::setMiscReg ( int  misc_reg,
const TheISA::MiscReg &  val,
ThreadID  tid 
)

Sets a misc.

register, including any side effects the write might have as defined by the architecture.

Definition at line 1229 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::setMiscRegNoEffect ( int  misc_reg,
const TheISA::MiscReg &  val,
ThreadID  tid 
)

Sets a miscellaneous register.

Definition at line 1221 of file cpu.cc.

template<class Impl >
bool FullO3CPU< Impl >::simPalCheck ( int  palFunc,
ThreadID  tid 
)
template<class Impl >
void FullO3CPU< Impl >::squashFromTC ( ThreadID  tid)

Initiates a squash of all in-flight instructions for a given thread.

The source of the squash is an external update of state through the TC.

Definition at line 1417 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::squashInstIt ( const ListIt instIt,
ThreadID  tid 
)
inline

Removes the instruction pointed to by the iterator.

Definition at line 1544 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::startup ( )
override

Definition at line 627 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::suspendContext ( ThreadID  tid)
override

Remove Thread from Active Threads List.

Definition at line 746 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::switchOut ( )
override

Switches out this CPU.

Definition at line 1159 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::syscall ( int64_t  callnum,
ThreadID  tid,
Fault fault 
)

Executes a syscall.

Todo:
: Determine if this needs to be virtual.

Definition at line 975 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::takeOverFrom ( BaseCPU oldCPU)
override

Takes over from another CPU.

Definition at line 1174 of file cpu.cc.

References FullO3CPU< Impl >::globalSeqNum, and takeOverFrom().

template<class Impl>
ThreadContext* FullO3CPU< Impl >::tcBase ( ThreadID  tid)
inline

Returns a pointer to a thread context.

Definition at line 643 of file cpu.hh.

template<class Impl >
void FullO3CPU< Impl >::tick ( )

Ticks CPU, calling tick() on each stage, and checking the overall activity to see if the CPU should deschedule itself.

Definition at line 540 of file cpu.cc.

References DPRINTF, Drained, and FullSystem.

template<class Impl >
Counter FullO3CPU< Impl >::totalInsts ( ) const
override

Count the Total Instructions Committed in the CPU.

Definition at line 681 of file cpu.cc.

References ArmISA::i, X86ISA::size(), and Stats::total.

template<class Impl >
Counter FullO3CPU< Impl >::totalOps ( ) const
override

Count the Total Ops (including micro ops) committed in the CPU.

Definition at line 694 of file cpu.cc.

References ArmISA::i, X86ISA::size(), and Stats::total.

template<class Impl >
void FullO3CPU< Impl >::trap ( const Fault fault,
ThreadID  tid,
const StaticInstPtr inst 
)

Traps to handle given fault.

Definition at line 966 of file cpu.cc.

template<class Impl >
bool FullO3CPU< Impl >::tryDrain ( )
private

Check if the pipeline has drained and signal drain done.

This method checks if a drain has been requested and if the CPU has drained successfully (i.e., there are no instructions in the pipeline). If the CPU has drained, it deschedules the tick event and signals the drain manager.

Returns
False if a drain hasn't been requested or the CPU hasn't drained, true otherwise.

Definition at line 1058 of file cpu.cc.

References DPRINTF, and Draining.

template<class Impl>
void FullO3CPU< Impl >::unscheduleTickEvent ( )
inlineprivate

Unschedule tick event, regardless of its current state.

Definition at line 227 of file cpu.hh.

template<class Impl >
void FullO3CPU< Impl >::unserializeThread ( CheckpointIn cp,
ThreadID  tid 
)
override

Definition at line 1002 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::updateThreadPriority ( )

Update The Order In Which We Process Threads.

Definition at line 1669 of file cpu.cc.

template<class Impl >
void FullO3CPU< Impl >::verifyMemoryMode ( ) const
override

Definition at line 1196 of file cpu.cc.

References fatal, and ArmISA::system.

template<class Impl >
void FullO3CPU< Impl >::wakeCPU ( )

Wakes the CPU, rescheduling the CPU if it's not already active.

Definition at line 1619 of file cpu.cc.

References DPRINTF.

template<class Impl >
void FullO3CPU< Impl >::wakeup ( ThreadID  tid)
overridevirtual

Definition at line 1642 of file cpu.cc.

References DPRINTF, ArmISA::status, ThreadContext::Suspended, and PseudoInst::wakeCPU().

template<class Impl>
Fault FullO3CPU< Impl >::write ( RequestPtr req,
RequestPtr sreqLow,
RequestPtr sreqHigh,
uint8_t *  data,
int  store_idx 
)
inline

CPU write function, forwards write to LSQ.

Definition at line 686 of file cpu.hh.

Friends And Related Function Documentation

template<class Impl>
friend class O3ThreadContext< Impl >
friend

Definition at line 111 of file cpu.hh.

Member Data Documentation

template<class Impl>
Status FullO3CPU< Impl >::_status

Overall CPU status.

Definition at line 126 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
std::list<ThreadID> FullO3CPU< Impl >::activeThreads
protected

Active Threads List.

Definition at line 559 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU(), and FullO3CPU< O3CPUImpl >::numActiveThreads().

template<class Impl>
ActivityRecorder FullO3CPU< Impl >::activityRec
private

The activity recorder; used to tell if the CPU has any activity remaining or if it can go to idle and deschedule itself.

Definition at line 618 of file cpu.hh.

Referenced by FullO3CPU< O3CPUImpl >::activateStage(), FullO3CPU< O3CPUImpl >::activityThisCycle(), and FullO3CPU< O3CPUImpl >::deactivateStage().

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::ccRegfileReads

Definition at line 726 of file cpu.hh.

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::ccRegfileWrites

Definition at line 727 of file cpu.hh.

template<class Impl>
Checker<Impl>* FullO3CPU< Impl >::checker

Pointer to the checker, which can dynamically verify instruction results at run time.

This can be set to NULL if it is not being used.

Definition at line 655 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
CPUPolicy::Commit FullO3CPU< Impl >::commit
protected

The commit stage.

Definition at line 541 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
CPUPolicy::RenameMap FullO3CPU< Impl >::commitRenameMap[Impl::MaxThreads]
protected

The commit rename map.

Definition at line 553 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
Stats::Vector FullO3CPU< Impl >::committedInsts

Stat for the number of committed instructions per thread.

Definition at line 707 of file cpu.hh.

template<class Impl>
Stats::Vector FullO3CPU< Impl >::committedOps

Stat for the number of committed ops (including micro ops) per thread.

Definition at line 709 of file cpu.hh.

template<class Impl>
Stats::Formula FullO3CPU< Impl >::cpi

Stat for the CPI per thread.

Definition at line 711 of file cpu.hh.

template<class Impl>
std::list<int> FullO3CPU< Impl >::cpuWaitList

Threads Scheduled to Enter CPU.

Definition at line 664 of file cpu.hh.

template<class Impl>
DcachePort FullO3CPU< Impl >::dcachePort
protected

Data port.

Note that it has to appear after the iew stages

Definition at line 570 of file cpu.hh.

Referenced by FullO3CPU< O3CPUImpl >::getDataPort().

template<class Impl>
CPUPolicy::Decode FullO3CPU< Impl >::decode
protected

The decode stage.

Definition at line 532 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
TimeBuffer<DecodeStruct> FullO3CPU< Impl >::decodeQueue

The decode stage's instruction queue.

Definition at line 605 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
TheISA::TLB* FullO3CPU< Impl >::dtb
template<class Impl>
CPUPolicy::Fetch FullO3CPU< Impl >::fetch
protected

The fetch stage.

Definition at line 529 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU(), and FullO3CPU< Impl >::IcachePort::recvReqRetry().

template<class Impl>
TimeBuffer<FetchStruct> FullO3CPU< Impl >::fetchQueue

The fetch stage's instruction queue.

Definition at line 602 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::fpRegfileReads

Definition at line 723 of file cpu.hh.

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::fpRegfileWrites

Definition at line 724 of file cpu.hh.

template<class Impl>
CPUPolicy::FreeList FullO3CPU< Impl >::freeList
protected

The free list.

Definition at line 547 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
InstSeqNum FullO3CPU< Impl >::globalSeqNum

The global sequence number counter.

Definition at line 649 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU(), FullO3CPU< O3CPUImpl >::getAndIncrementInstSeq(), and FullO3CPU< Impl >::takeOverFrom().

template<class Impl>
IcachePort FullO3CPU< Impl >::icachePort
protected

Instruction port.

Note that it has to appear after the fetch stage.

Definition at line 567 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU(), and FullO3CPU< O3CPUImpl >::getInstPort().

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::idleCycles

Stat for total number of cycles the CPU spends descheduled.

Definition at line 702 of file cpu.hh.

template<class Impl>
CPUPolicy::IEW FullO3CPU< Impl >::iew
protected

The issue/execute/writeback stages.

Definition at line 538 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU(), FullO3CPU< O3CPUImpl >::read(), and FullO3CPU< O3CPUImpl >::write().

template<class Impl>
TimeBuffer<IEWStruct> FullO3CPU< Impl >::iewQueue

The IEW stage's instruction queue.

Definition at line 611 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
int FullO3CPU< Impl >::instcount

Count of total number of dynamic instructions in flight.

Definition at line 504 of file cpu.hh.

template<class Impl>
std::list<DynInstPtr> FullO3CPU< Impl >::instList

List of all the instructions in flight.

Definition at line 508 of file cpu.hh.

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::intRegfileReads

Definition at line 720 of file cpu.hh.

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::intRegfileWrites

Definition at line 721 of file cpu.hh.

template<class Impl>
Stats::Formula FullO3CPU< Impl >::ipc

Stat for the IPC per thread.

Definition at line 715 of file cpu.hh.

template<class Impl>
std::vector<TheISA::ISA *> FullO3CPU< Impl >::isa
protected

Definition at line 564 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
TheISA::TLB* FullO3CPU< Impl >::itb
template<class Impl>
Tick FullO3CPU< Impl >::lastActivatedCycle

The cycle that the CPU was last activated by a new thread.

Definition at line 670 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
Cycles FullO3CPU< Impl >::lastRunningCycle

The cycle that the CPU was last running, used for statistics.

Definition at line 667 of file cpu.hh.

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::miscRegfileReads

Definition at line 729 of file cpu.hh.

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::miscRegfileWrites

Definition at line 730 of file cpu.hh.

template<class Impl>
ProbePointArg<std::pair<DynInstPtr, PacketPtr> >* FullO3CPU< Impl >::ppDataAccessComplete

Definition at line 270 of file cpu.hh.

template<class Impl>
ProbePointArg<PacketPtr>* FullO3CPU< Impl >::ppInstAccessComplete

Definition at line 269 of file cpu.hh.

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::quiesceCycles

Stat for total number of cycles the CPU spends descheduled due to a quiesce operation or waiting for an interrupt.

Definition at line 705 of file cpu.hh.

template<class Impl>
PhysRegFile FullO3CPU< Impl >::regFile
protected

The register file.

Definition at line 544 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
bool FullO3CPU< Impl >::removeInstsThisCycle

Records if instructions need to be removed this cycle due to being retired or squashed.

Definition at line 525 of file cpu.hh.

template<class Impl>
std::queue<ListIt> FullO3CPU< Impl >::removeList

List of all the instructions that will be removed at the end of this cycle.

Definition at line 513 of file cpu.hh.

template<class Impl>
CPUPolicy::Rename FullO3CPU< Impl >::rename
protected

The dispatch stage.

Definition at line 535 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
CPUPolicy::RenameMap FullO3CPU< Impl >::renameMap[Impl::MaxThreads]
protected

The rename map.

Definition at line 550 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
TimeBuffer<RenameStruct> FullO3CPU< Impl >::renameQueue

The rename stage's instruction queue.

Definition at line 608 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
CPUPolicy::ROB FullO3CPU< Impl >::rob
protected

The re-order buffer.

Definition at line 556 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
Scoreboard FullO3CPU< Impl >::scoreboard
protected

Integer Register Scoreboard.

Definition at line 562 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
System* FullO3CPU< Impl >::system

Pointer to the system.

Definition at line 658 of file cpu.hh.

template<class Impl>
std::vector<Thread *> FullO3CPU< Impl >::thread

Pointers to all of the threads in the CPU.

Definition at line 661 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU(), and FullO3CPU< O3CPUImpl >::tcBase().

template<class Impl>
std::map<ThreadID, unsigned> FullO3CPU< Impl >::threadMap

Mapping for system thread id to cpu id.

Definition at line 673 of file cpu.hh.

template<class Impl>
TickEvent FullO3CPU< Impl >::tickEvent
private

The tick event used for scheduling CPU ticks.

Definition at line 215 of file cpu.hh.

Referenced by FullO3CPU< O3CPUImpl >::scheduleTickEvent(), and FullO3CPU< O3CPUImpl >::unscheduleTickEvent().

template<class Impl>
std::vector<ThreadID> FullO3CPU< Impl >::tids

Available thread ids in the cpu.

Definition at line 676 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
TimeBuffer<TimeStruct> FullO3CPU< Impl >::timeBuffer

The main time buffer to do backwards communication.

Definition at line 599 of file cpu.hh.

Referenced by FullO3CPU< Impl >::FullO3CPU().

template<class Impl>
Stats::Scalar FullO3CPU< Impl >::timesIdled

Stat for total number of times the CPU is descheduled.

Definition at line 700 of file cpu.hh.

template<class Impl>
Stats::Formula FullO3CPU< Impl >::totalCpi

Stat for the total CPI.

Definition at line 713 of file cpu.hh.

template<class Impl>
Stats::Formula FullO3CPU< Impl >::totalIpc

Stat for the total IPC.

Definition at line 717 of file cpu.hh.


The documentation for this class was generated from the following files:

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